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Searched refs:cache_is_vivt (Results 1 – 8 of 8) sorted by relevance

/arch/arm/mm/
Dflush.c68 if (cache_is_vivt()) { in flush_cache_mm()
84 if (cache_is_vivt()) { in flush_cache_range()
103 if (cache_is_vivt()) { in flush_cache_page()
134 if (cache_is_vivt()) { in __flush_ptrace_access()
343 if (mapping && cache_is_vivt()) in flush_dcache_page()
363 if (cache_is_vivt() || cache_is_vipt_aliasing()) { in flush_kernel_dcache_page()
406 if (cache_is_vivt()) { in __flush_anon_page()
Dhighmem.c72 if (!cache_is_vivt()) in kmap_atomic()
111 if (cache_is_vivt()) in __kunmap_atomic()
Dfault-armv.c202 if (cache_is_vivt()) in update_mmu_cache()
/arch/arm/include/asm/
Dhighmem.h17 if (cache_is_vivt()) \
Dcachetype.h15 #define cache_is_vivt() cacheid_is(CACHEID_VIVT) macro
Dcacheflush.h299 if ((cache_is_vivt() || cache_is_vipt_aliasing())) in flush_kernel_vmap_range()
304 if ((cache_is_vivt() || cache_is_vipt_aliasing())) in invalidate_kernel_vmap_range()
Dmmu_context.h149 if (cache_is_vivt()) in switch_mm()
/arch/arm/kernel/
Dsetup.c351 cache_is_vivt() ? "VIVT" : in cacheid_init()
354 cache_is_vivt() ? "VIVT" : in cacheid_init()