Searched refs:cache_level (Results 1 – 5 of 5) sorted by relevance
| /arch/arm/mm/ |
| D | cache-uniphier.c | 323 unsigned int *cache_level) in __uniphier_cache_init() argument
332 *cache_level); in __uniphier_cache_init()
337 pr_err("L%d: cache-level is not specified\n", *cache_level); in __uniphier_cache_init()
341 if (level != *cache_level) { in __uniphier_cache_init()
343 *cache_level, level); in __uniphier_cache_init()
348 pr_err("L%d: cache-unified is not specified\n", *cache_level); in __uniphier_cache_init()
359 *cache_level); in __uniphier_cache_init()
367 *cache_level); in __uniphier_cache_init()
375 *cache_level); in __uniphier_cache_init()
385 pr_err("L%d: failed to map control register\n", *cache_level); in __uniphier_cache_init()
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| D | cache-l2x0.c | 1759 u32 cache_level = 2; in l2x0_of_init() local
1793 if (of_property_read_u32(np, "cache-level", &cache_level)) in l2x0_of_init()
1796 if (cache_level != 2) in l2x0_of_init()
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| /arch/x86/kernel/cpu/ |
| D | intel_rdt.c | 77 .cache_level = 3,
94 .cache_level = 3,
111 .cache_level = 3,
128 .cache_level = 2,
145 .cache_level = 3,
467 int id = get_cache_id(cpu, r->cache_level); in domain_add_cpu()
511 int id = get_cache_id(cpu, r->cache_level); in domain_remove_cpu()
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| D | intel_rdt.h | 323 int cache_level; member
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| /arch/ia64/include/asm/ |
| D | pal.h | 908 ia64_pal_cache_config_info (u64 cache_level, u64 cache_type, pal_cache_config_info_t *conf) in ia64_pal_cache_config_info() argument
912 PAL_CALL(iprv, PAL_CACHE_INFO, cache_level, cache_type, 0); in ia64_pal_cache_config_info()
926 ia64_pal_cache_prot_info (u64 cache_level, u64 cache_type, pal_cache_protection_info_t *prot) in ia64_pal_cache_prot_info() argument
930 PAL_CALL(iprv, PAL_CACHE_PROT_INFO, cache_level, cache_type, 0); in ia64_pal_cache_prot_info()
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