Searched refs:cached (Results 1 – 22 of 22) sorted by relevance
| /arch/frv/include/asm/ |
| D | highmem.h | 77 #define __kmap_atomic_primary(cached, paddr, ampr) \ argument
83 if (!cached) \
124 #define __kunmap_atomic_primary(cached, ampr) \ argument
127 if (cached) \
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| /arch/frv/mm/ |
| D | tlb-flush.S | 50 # kill cached PGE value
55 # kill AMPR-cached TLB values
94 # kill cached PGE value
134 # kill cached PGE value
162 # kill cached PGE value
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| D | tlb-miss.S | 128 # SCR0 - base of virtual range covered by cached PGE from last ITLB miss (or 0xffffffff)
149 # see if the cached page table mapping is appropriate
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| /arch/arm/mach-omap2/ |
| D | sram.c | 125 int cached = 1; in omap2_map_sram() local
135 cached = 0; in omap2_map_sram()
139 omap_sram_skip, cached); in omap2_map_sram()
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| /arch/arm/plat-omap/ |
| D | sram.c | 101 unsigned long skip, int cached) in omap_map_sram() argument
112 omap_sram_base = __arm_ioremap_exec(start, size, cached); in omap_map_sram()
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| /arch/arm/plat-omap/include/plat/ |
| D | sram.h | 5 unsigned long skip, int cached);
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| /arch/s390/appldata/ |
| D | appldata_mem.c | 57 u64 cached; /* size of (used) cache, w/o buffers */ member
105 mem_data->cached = P2K(global_node_page_state(NR_FILE_PAGES) in appldata_get_mem_data()
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| /arch/cris/arch-v10/ |
| D | README.mm | 53 FFFFFFFF| | => cached | |
59 DFFFFFFF| | paged to any | Un-cached |
97 The kernel needs access to both cached and uncached flash. Uncached is
109 R_MMU_KSEG = ( ( seg_f, seg ) | // Flash cached
126 R_MMU_KBASE_HI = ( ( base_f, 0x0 ) | // flash/sram/periph cached
129 ( base_c, 0x4 ) | // physical RAM cached area
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| /arch/cris/arch-v32/kernel/ |
| D | head.S | 173 jump _inram ; Jump to cached RAM.
231 add.d 0xf0000000, $r4 ; Add cached flash start in virtual memory.
238 jump _start_it ; Jump to cached code.
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| /arch/arm/mm/ |
| D | ioremap.c | 409 __arm_ioremap_exec(phys_addr_t phys_addr, size_t size, bool cached) in __arm_ioremap_exec() argument
413 if (cached) in __arm_ioremap_exec()
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| D | Kconfig | 221 The ARM1020 is the 32K cached version of the ARM10 processor,
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| /arch/powerpc/platforms/powernv/ |
| D | vas-window.c | 1068 int cached; in poll_window_castout() local
1074 cached = GET_FIELD(VAS_WIN_CACHE_STATUS, val); in poll_window_castout()
1075 if (cached) { in poll_window_castout()
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| /arch/xtensa/ |
| D | Kconfig | 286 bool "MMUv2: 128MB cached + 128MB uncached"
294 bool "256MB cached + 256MB uncached"
302 bool "512MB cached + 512MB uncached"
318 at 0xd0000000 (cached) and 0xd8000000 (uncached).
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| /arch/arm/include/asm/ |
| D | io.h | 145 extern void __iomem *__arm_ioremap_exec(phys_addr_t, size_t, bool cached);
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| /arch/cris/boot/rescue/ |
| D | head_v10.S | 130 jump in_cache ; enter cached area instead
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| /arch/frv/kernel/ |
| D | head-mmu-fr451.S | 275 movgs gr8,iampr1 ; cached kernel memory at 0x00000000
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| D | sleep.S | 257 movgs gr5,iampr1 ; cached kernel memory at 0x00000000
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| /arch/microblaze/ |
| D | Kconfig | 254 For example, each cached file will using a multiple of the
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| /arch/cris/arch-v10/kernel/ |
| D | head.S | 157 jump _inram ; enter cached ram
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| /arch/sparc/lib/ |
| D | M7memcpy.S | 448 ! other cached values during a large memcpy
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| /arch/powerpc/ |
| D | Kconfig | 706 For example, each cached file will using a multiple of the
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| /arch/arm64/ |
| D | Kconfig | 524 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID
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