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Searched refs:dccr (Results 1 – 13 of 13) sorted by relevance

/arch/sparc/mm/
Dleon_mm.c218 unsigned long ccr, iccr, dccr; in leon3_getCacheRegs() local
228 : "=r"(ccr), "=r"(iccr), "=r"(dccr) in leon3_getCacheRegs()
235 regs->dccr = dccr; in leon3_getCacheRegs()
255 sets = (cregs.dccr & LEON3_XCCR_SETS_MASK) >> 24; in leon_flush_needed()
257 ssize = 1 << ((cregs.dccr & LEON3_XCCR_SSIZE_MASK) >> 20); in leon_flush_needed()
/arch/cris/include/arch-v10/arch/
Dprocessor.h24 unsigned long dccr; /* saved flag register */ member
58 regs->dccr |= 1 << U_DCCR_BITNR; \
/arch/cris/include/uapi/asm/
Dptrace_v10.h78 unsigned long dccr; member
113 #define user_mode(regs) (((regs)->dccr & 0x100) != 0)
Delf_v10.h69 pr_reg[21] = (regs->dccr & 0xffff); /* ccr */ \
77 pr_reg[29] = regs->dccr; /* dccr */ \
/arch/cris/arch-v10/kernel/
Dentry.S97 ;; we cannot simply test $dccr, because that does not necessarily
207 pop $dccr ; condition codes
221 pop $dccr ; condition codes
310 move $dccr, [$r10+THREAD_dccr]; save irq enable state
330 move [$r11+THREAD_dccr], $dccr ; restore irq enable status
345 push $dccr
385 pop $dccr
390 pop $dccr
395 push $dccr
420 push $dccr
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Dprocess.c99 childregs->dccr = 1 << I_DCCR_BITNR; in copy_thread()
170 regs->irp, regs->srp, regs->dccr, usp, regs->mof ); in show_regs()
Dtraps.c31 regs->irp, regs->srp, regs->dccr, usp, regs->mof); in show_registers()
Dsignal.c84 regs->dccr |= 1 << 8; in restore_sigcontext()
Dkgdb.c229 unsigned int dccr; /* 0x5E Double condition code register */ member
/arch/cris/kernel/
Dasm-offsets.c31 ENTRY(dccr); in main()
48 ENTRY(dccr); in main()
/arch/cris/include/uapi/arch-v10/arch/
Duser.h38 unsigned long dccr; /* Dword condition code register. */ member
/arch/powerpc/include/asm/
Dmpc5121.h38 u32 dccr; /* DIU Clock Control Register */ member
/arch/sparc/include/asm/
Dleon.h213 unsigned long dccr; /* 0x0c - Data Cache Configuration Register */ member