| /arch/mips/include/asm/ |
| D | switch_to.h | 89 unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31); \
92 if (unlikely(fcr31)) { \
94 next->thread.fpu.fcr31 &= ~fcr31; \
95 force_fcr31_sig(fcr31, pc, next); \
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| D | fpu_emulator.h | 182 void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr,
185 unsigned long fcr31);
206 static inline unsigned long mask_fcr31_x(unsigned long fcr31) in mask_fcr31_x() argument
208 return fcr31 & (FPU_CSR_UNI_X | in mask_fcr31_x()
209 ((fcr31 & FPU_CSR_ALL_E) << in mask_fcr31_x()
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| D | fpu.h | 175 tsk->thread.fpu.fcr31 = in lose_fpu_inatomic()
203 unsigned int fcr31 = current->thread.fpu.fcr31; in init_fpu() local
214 _init_fpu(fcr31); in init_fpu()
228 _init_fpu(fcr31); in init_fpu()
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| D | mips-r2-to-r6-emul.h | 88 unsigned long *fcr31) in mipsr2_decoder() argument
96 unsigned long *fcr31);
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| D | fpregdef.h | 70 #define fcr31 $31 /* FPU status register */ macro
109 #define fcr31 $31 macro
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| D | asmmacro-32.h | 19 cfc1 \tmp, fcr31
60 ctc1 \tmp, fcr31
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| D | processor.h | 138 unsigned int fcr31; member
331 .fcr31 = 0, \
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| D | asmmacro.h | 87 cfc1 \tmp, fcr31
163 ctc1 \tmp, fcr31
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| /arch/mips/kernel/ |
| D | traps.c | 722 void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr, in force_fcr31_sig() argument
727 if (fcr31 & FPU_CSR_INV_X) in force_fcr31_sig()
729 else if (fcr31 & FPU_CSR_DIV_X) in force_fcr31_sig()
731 else if (fcr31 & FPU_CSR_OVF_X) in force_fcr31_sig()
733 else if (fcr31 & FPU_CSR_UDF_X) in force_fcr31_sig()
735 else if (fcr31 & FPU_CSR_INE_X) in force_fcr31_sig()
741 int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcr31) in process_fpemu_return() argument
751 force_fcr31_sig(fcr31, fault_addr, current); in process_fpemu_return()
785 unsigned long fcr31; in simulate_fp() local
820 fcr31 = mask_fcr31_x(current->thread.fpu.fcr31); in simulate_fp()
[all …]
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| D | branch.c | 62 unsigned int fcr31; in __mm_isBranchInstr() local
150 fcr31 = read_32bit_cp1_register(CP1_STATUS); in __mm_isBranchInstr()
152 fcr31 = current->thread.fpu.fcr31; in __mm_isBranchInstr()
156 fcr31 = ~fcr31; in __mm_isBranchInstr()
161 if (fcr31 & (1 << bit)) in __mm_isBranchInstr()
419 unsigned int bit, fcr31, dspcontrol, reg; in __compute_return_epc_for_insn() local
704 fcr31 = read_32bit_cp1_register(CP1_STATUS); in __compute_return_epc_for_insn()
706 fcr31 = current->thread.fpu.fcr31; in __compute_return_epc_for_insn()
715 if (~fcr31 & (1 << bit)) { in __compute_return_epc_for_insn()
727 if (fcr31 & (1 << bit)) { in __compute_return_epc_for_insn()
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| D | ptrace.c | 89 u32 fcr31; in ptrace_setfcr31() local
92 fcr31 = child->thread.fpu.fcr31; in ptrace_setfcr31()
94 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask); in ptrace_setfcr31()
167 __put_user(child->thread.fpu.fcr31, data + 64); in ptrace_getfpregs()
476 &target->thread.fpu.fcr31, in fpr_get()
548 u32 fcr31; in fpr_set() local
567 &fcr31, in fpr_set()
572 ptrace_setfcr31(target, fcr31); in fpr_set()
835 tmp = child->thread.fpu.fcr31; in arch_ptrace()
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| D | ptrace32.c | 129 tmp = child->thread.fpu.fcr31; in compat_arch_ptrace()
206 child->thread.fpu.fcr31 = 0; in compat_arch_ptrace()
231 child->thread.fpu.fcr31 = data; in compat_arch_ptrace()
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| D | r2300_fpu.S | 72 ctc1 a0, fcr31
127 cfc1 t1, fcr31
179 ctc1 t0, fcr31
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| D | elf.c | 314 t->thread.fpu.fcr31 = c->fpu_csr31; in mips_set_personality_nan()
320 t->thread.fpu.fcr31 |= FPU_CSR_NAN2008; in mips_set_personality_nan()
322 t->thread.fpu.fcr31 |= FPU_CSR_ABS2008; in mips_set_personality_nan()
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| D | kgdb.c | 147 memcpy((void *)¤t->thread.fpu.fcr31, mem, in dbg_set_reg()
182 memcpy(mem, (void *)¤t->thread.fpu.fcr31, in dbg_get_reg()
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| D | r4k_fpu.S | 107 ctc1 a0, fcr31
246 cfc1 t1, fcr31
365 ctc1 t1, fcr31
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| D | mips-r2-to-r6-emul.c | 204 csr = current->thread.fpu.fcr31; in movf_func()
227 csr = current->thread.fpu.fcr31; in movt_func()
906 int mipsr2_decoder(struct pt_regs *regs, u32 inst, unsigned long *fcr31) in mipsr2_decoder() argument
1192 *fcr31 = res = mask_fcr31_x(current->thread.fpu.fcr31); in mipsr2_decoder()
1193 current->thread.fpu.fcr31 &= ~res; in mipsr2_decoder()
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| D | asm-offsets.c | 173 OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31); in output_thread_fpu_defines()
381 OFFSET(VCPU_FCR31, kvm_vcpu_arch, fpu.fcr31); in output_kvm_defines()
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| D | signal.c | 83 err |= __put_user(current->thread.fpu.fcr31, csr); in copy_fp_to_sigcontext()
102 err |= __get_user(current->thread.fpu.fcr31, csr); in copy_fp_from_sigcontext()
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| D | genex.S | 438 cfc1 a1, fcr31
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| /arch/mips/math-emu/ |
| D | cp1emu.c | 440 unsigned int fcr31; in isBranchInstr() local
738 fcr31 = read_32bit_cp1_register(CP1_STATUS); in isBranchInstr()
740 fcr31 = current->thread.fpu.fcr31; in isBranchInstr()
749 if (~fcr31 & (1 << bit)) in isBranchInstr()
760 if (fcr31 & (1 << bit)) in isBranchInstr()
855 u32 fcr31 = ctx->fcr31; in cop1_cfc() local
860 value = fcr31; in cop1_cfc()
868 value = (fcr31 >> (FPU_CSR_FS_S - MIPS_FENR_FS_S)) & in cop1_cfc()
870 value |= fcr31 & (FPU_CSR_ALL_E | FPU_CSR_RM); in cop1_cfc()
878 value = fcr31 & (FPU_CSR_ALL_X | FPU_CSR_ALL_S); in cop1_cfc()
[all …]
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| D | ieee754.h | 166 #define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.fcr31))
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| /arch/mips/loongson64/loongson-3/ |
| D | cop2-ex.c | 47 _init_fpu(current->thread.fpu.fcr31); in loongson_cu2_call()
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| /arch/mips/kvm/ |
| D | fpu.S | 121 ctc1 t0, fcr31
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| D | mips.c | 706 v = fpu->fcr31; in kvm_mips_get_reg()
840 fpu->fcr31 = v; in kvm_mips_set_reg()
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