Searched refs:i8 (Results 1 – 8 of 8) sorted by relevance
/arch/arm/crypto/ |
D | crct10dif-ce-core.S | 107 vmov.i8 qzr, #0 // init zero register 283 vmov.i8 q9, #0x80 335 vmov.i8 q0, #0 362 vmov.i8 q9, #0x80
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D | crc32-ce-core.S | 136 vmov.i8 qzr, #0 137 vmov.i8 qCONSTANT, #0 219 vmov.i8 d7, #0
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D | aes-neonbs-core.S | 425 vmov.i8 \t0, #0x55 426 vmov.i8 \t1, #0x33 429 vmov.i8 \t0, #0x0f 446 vmov.i8 q8, #0x01 // bit masks 447 vmov.i8 q9, #0x02 448 vmov.i8 q10, #0x04 449 vmov.i8 q11, #0x08 450 vmov.i8 q12, #0x10 451 vmov.i8 q13, #0x20 459 vmov.i8 q6, #0x40 [all …]
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D | ghash-ce-core.S | 218 vmov.i8 MASK, #0xe1
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/arch/mips/include/asm/octeon/ |
D | cvmx-fau.h | 307 uint64_t i8; in cvmx_fau_tagwait_fetch_and_add8() member 311 result.i8 = cvmx_read64_int8(__cvmx_fau_atomic_address(1, reg, value)); in cvmx_fau_tagwait_fetch_and_add8()
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/arch/arm/nwfpe/ |
D | ChangeLog | 3 Used "indent -kr -i8 -ts8 -sob -l132 -ss" and a few manual fixups.
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/arch/mips/include/uapi/asm/ |
D | inst.h | 1100 struct m16e_i8 i8; member
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/arch/mips/kernel/ |
D | unaligned.c | 2098 if (mips16inst.i8.func != MIPS16e_swrasp_func) in emulate_load_store_MIPS16e()
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