/arch/x86/um/ |
D | tls_32.c | 66 int idx; in get_free_idx() local 71 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx() 72 if (!t->arch.tls_array[idx].present) in get_free_idx() 73 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx() 95 int idx; in load_TLS() local 97 for (idx = GDT_ENTRY_TLS_MIN; idx < GDT_ENTRY_TLS_MAX; idx++) { in load_TLS() 99 &to->thread.arch.tls_array[idx - GDT_ENTRY_TLS_MIN]; in load_TLS() 108 curr->tls.entry_number = idx; in load_TLS() 204 int idx, int flushed) in set_tls_entry() argument 208 if (idx < GDT_ENTRY_TLS_MIN || idx > GDT_ENTRY_TLS_MAX) in set_tls_entry() [all …]
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/arch/x86/crypto/sha512-mb/ |
D | sha512_mb_mgr_flush_avx2.S | 64 # idx needs to be other than arg1, arg2, rbx, r12 65 #define idx %rdx macro 120 xor idx, idx 123 cmovne one(%rip), idx 126 cmovne two(%rip), idx 129 cmovne three(%rip), idx 131 # copy idx to empty lanes 134 mov offset(state,idx,8), tmp 153 mov lens0,idx 155 cmp idx,lens1 [all …]
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/arch/blackfin/kernel/cplb-nompu/ |
D | cplbmgr.c | 39 static inline void write_dcplb_data(int cpu, int idx, unsigned long data, in write_dcplb_data() argument 43 bfin_write32(DCPLB_DATA0 + idx * 4, data); in write_dcplb_data() 44 bfin_write32(DCPLB_ADDR0 + idx * 4, addr); in write_dcplb_data() 48 dcplb_tbl[cpu][idx].addr = addr; in write_dcplb_data() 49 dcplb_tbl[cpu][idx].data = data; in write_dcplb_data() 53 static inline void write_icplb_data(int cpu, int idx, unsigned long data, in write_icplb_data() argument 57 bfin_write32(ICPLB_DATA0 + idx * 4, data); in write_icplb_data() 58 bfin_write32(ICPLB_ADDR0 + idx * 4, addr); in write_icplb_data() 62 icplb_tbl[cpu][idx].addr = addr; in write_icplb_data() 63 icplb_tbl[cpu][idx].data = data; in write_icplb_data() [all …]
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/arch/frv/mb93090-mb00/ |
D | pci-frv.c | 86 int idx; in pcibios_allocate_bus_resources() local 93 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { in pcibios_allocate_bus_resources() 94 r = &dev->resource[idx]; in pcibios_allocate_bus_resources() 97 pci_claim_bridge_resource(dev, idx); in pcibios_allocate_bus_resources() 107 int idx, disabled; in pcibios_allocate_resources() local 113 for(idx = 0; idx < 6; idx++) { in pcibios_allocate_resources() 114 r = &dev->resource[idx]; in pcibios_allocate_resources() 126 if (pci_claim_resource(dev, idx) < 0) { in pcibios_allocate_resources() 150 int idx, err; in pcibios_assign_resources() local 160 for(idx=0; idx<6; idx++) { in pcibios_assign_resources() [all …]
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/arch/x86/events/intel/ |
D | uncore_nhmex.c | 249 if (hwc->idx == UNCORE_PMC_IDX_FIXED) in nhmex_uncore_msr_enable_event() 371 reg1->idx = 0; in nhmex_bbox_hw_config() 383 if (reg1->idx != EXTRA_REG_NONE) { in nhmex_bbox_msr_enable_event() 456 reg1->idx = 0; in nhmex_sbox_hw_config() 468 if (reg1->idx != EXTRA_REG_NONE) { in nhmex_sbox_msr_enable_event() 553 static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64 config) in nhmex_mbox_get_shared_reg() argument 560 if (idx < EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) { in nhmex_mbox_get_shared_reg() 561 er = &box->shared_regs[idx]; in nhmex_mbox_get_shared_reg() 577 idx -= EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; in nhmex_mbox_get_shared_reg() 578 if (WARN_ON_ONCE(idx >= 4)) in nhmex_mbox_get_shared_reg() [all …]
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/arch/x86/kernel/ |
D | tls.c | 24 int idx; in get_free_idx() local 26 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx() 27 if (desc_empty(&t->tls_array[idx])) in get_free_idx() 28 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx() 84 static void set_tls_desc(struct task_struct *p, int idx, in set_tls_desc() argument 88 struct desc_struct *desc = &t->tls_array[idx - GDT_ENTRY_TLS_MIN]; in set_tls_desc() 114 int do_set_thread_area(struct task_struct *p, int idx, in do_set_thread_area() argument 127 if (idx == -1) in do_set_thread_area() 128 idx = info.entry_number; in do_set_thread_area() 134 if (idx == -1 && can_allocate) { in do_set_thread_area() [all …]
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/arch/sh/kernel/cpu/sh5/ |
D | clock-sh5.c | 27 int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007; in master_clk_init() local 28 clk->rate *= ifc_table[idx]; in master_clk_init() 37 int idx = (__raw_readw(cprc_base) >> 12) & 0x0007; in module_clk_recalc() local 38 return clk->parent->rate / ifc_table[idx]; in module_clk_recalc() 47 int idx = (__raw_readw(cprc_base) >> 3) & 0x0007; in bus_clk_recalc() local 48 return clk->parent->rate / ifc_table[idx]; in bus_clk_recalc() 57 int idx = (__raw_readw(cprc_base) & 0x0007); in cpu_clk_recalc() local 58 return clk->parent->rate / ifc_table[idx]; in cpu_clk_recalc() 72 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 77 if (idx < ARRAY_SIZE(sh5_clk_ops)) in arch_init_clk_ops() [all …]
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/arch/sh/kernel/cpu/sh3/ |
D | clock-sh7706.c | 28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local 30 clk->rate *= pfc_divisors[idx]; in master_clk_init() 40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local 42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local 54 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc() 64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local 66 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc() 80 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 82 if (idx < ARRAY_SIZE(sh7706_clk_ops)) in arch_init_clk_ops() [all …]
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D | clock-sh3.c | 32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local 34 clk->rate *= pfc_divisors[idx]; in master_clk_init() 44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local 46 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local 58 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc() 68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local 70 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc() 84 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 86 if (idx < ARRAY_SIZE(sh3_clk_ops)) in arch_init_clk_ops() [all …]
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D | clock-sh7709.c | 28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local 30 clk->rate *= pfc_divisors[idx]; in master_clk_init() 40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local 42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 52 int idx = (frqcr & 0x0080) ? in bus_clk_recalc() local 55 return clk->parent->rate * stc_multipliers[idx]; in bus_clk_recalc() 65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local 67 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc() 81 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 83 if (idx < ARRAY_SIZE(sh7709_clk_ops)) in arch_init_clk_ops() [all …]
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D | clock-sh7712.c | 27 int idx = (frqcr & 0x0300) >> 8; in master_clk_init() local 29 clk->rate *= multipliers[idx]; in master_clk_init() 39 int idx = frqcr & 0x0007; in module_clk_recalc() local 41 return clk->parent->rate / divisors[idx]; in module_clk_recalc() 51 int idx = (frqcr & 0x0030) >> 4; in cpu_clk_recalc() local 53 return clk->parent->rate / divisors[idx]; in cpu_clk_recalc() 66 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 68 if (idx < ARRAY_SIZE(sh7712_clk_ops)) in arch_init_clk_ops() 69 *ops = sh7712_clk_ops[idx]; in arch_init_clk_ops()
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D | clock-sh7710.c | 38 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local 39 return clk->parent->rate / md_table[idx]; in module_clk_recalc() 48 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; in bus_clk_recalc() local 49 return clk->parent->rate / md_table[idx]; in bus_clk_recalc() 58 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; in cpu_clk_recalc() local 59 return clk->parent->rate / md_table[idx]; in cpu_clk_recalc() 73 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 75 if (idx < ARRAY_SIZE(sh7710_clk_ops)) in arch_init_clk_ops() 76 *ops = sh7710_clk_ops[idx]; in arch_init_clk_ops()
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D | clock-sh7705.c | 44 int idx = __raw_readw(FRQCR) & 0x0003; in module_clk_recalc() local 45 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8; in bus_clk_recalc() local 55 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc() 64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4; in cpu_clk_recalc() local 65 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc() 79 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 81 if (idx < ARRAY_SIZE(sh7705_clk_ops)) in arch_init_clk_ops() 82 *ops = sh7705_clk_ops[idx]; in arch_init_clk_ops()
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/arch/arm/mach-omap2/ |
D | cm2xxx_3xxx.h | 53 static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx) in omap2_cm_read_mod_reg() argument 55 return readl_relaxed(cm_base.va + module + idx); in omap2_cm_read_mod_reg() 58 static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) in omap2_cm_write_mod_reg() argument 60 writel_relaxed(val, cm_base.va + module + idx); in omap2_cm_write_mod_reg() 65 s16 idx) in omap2_cm_rmw_mod_reg_bits() argument 69 v = omap2_cm_read_mod_reg(module, idx); in omap2_cm_rmw_mod_reg_bits() 72 omap2_cm_write_mod_reg(v, module, idx); in omap2_cm_rmw_mod_reg_bits() 78 static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) in omap2_cm_read_mod_bits_shift() argument 82 v = omap2_cm_read_mod_reg(domain, idx); in omap2_cm_read_mod_bits_shift() 89 static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) in omap2_cm_set_mod_reg_bits() argument [all …]
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/arch/arm/mm/ |
D | highmem.c | 21 static inline void set_fixmap_pte(int idx, pte_t pte) in set_fixmap_pte() argument 23 unsigned long vaddr = __fix_to_virt(idx); in set_fixmap_pte() 57 unsigned int idx; in kmap_atomic() local 82 idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); in kmap_atomic() 83 vaddr = __fix_to_virt(idx); in kmap_atomic() 96 set_fixmap_pte(idx, mk_pte(page, kmap_prot)); in kmap_atomic() 105 int idx, type; in __kunmap_atomic() local 109 idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic() 114 BUG_ON(vaddr != __fix_to_virt(idx)); in __kunmap_atomic() 115 set_fixmap_pte(idx, __pte(0)); in __kunmap_atomic() [all …]
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/arch/sh/kernel/cpu/sh4a/ |
D | ubc.c | 18 #define UBC_CBR(idx) (0xff200000 + (0x20 * idx)) argument 19 #define UBC_CRR(idx) (0xff200004 + (0x20 * idx)) argument 20 #define UBC_CAR(idx) (0xff200008 + (0x20 * idx)) argument 21 #define UBC_CAMR(idx) (0xff20000c + (0x20 * idx)) argument 35 static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_enable() argument 37 __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx)); in sh4a_ubc_enable() 38 __raw_writel(info->address, UBC_CAR(idx)); in sh4a_ubc_enable() 41 static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_disable() argument 43 __raw_writel(0, UBC_CBR(idx)); in sh4a_ubc_disable() 44 __raw_writel(0, UBC_CAR(idx)); in sh4a_ubc_disable()
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D | clock-sh7770.c | 33 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f); in module_clk_recalc() local 34 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 43 int idx = (__raw_readl(FRQCR) & 0x000f); in bus_clk_recalc() local 44 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc() 53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f); in cpu_clk_recalc() local 54 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc() 68 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 70 if (idx < ARRAY_SIZE(sh7770_clk_ops)) in arch_init_clk_ops() 71 *ops = sh7770_clk_ops[idx]; in arch_init_clk_ops()
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/arch/metag/mm/ |
D | highmem.c | 43 enum fixed_addresses idx; in kmap_atomic() local 53 idx = type + KM_TYPE_NR * smp_processor_id(); in kmap_atomic() 54 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic() 56 BUG_ON(!pte_none(*(kmap_pte - idx))); in kmap_atomic() 58 set_pte(kmap_pte - idx, mk_pte(page, PAGE_KERNEL)); in kmap_atomic() 67 int idx, type; in __kunmap_atomic() local 71 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic() 79 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic() 96 enum fixed_addresses idx; in kmap_atomic_pfn() local 104 idx = type + KM_TYPE_NR * smp_processor_id(); in kmap_atomic_pfn() [all …]
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/arch/x86/crypto/sha256-mb/ |
D | sha256_mb_mgr_flush_avx2.S | 68 # idx must be a register not clobberred by sha1_mult 69 #define idx %r8 macro 114 xor idx, idx 117 cmovne one(%rip), idx 120 cmovne two(%rip), idx 123 cmovne three(%rip), idx 126 cmovne four(%rip), idx 129 cmovne five(%rip), idx 132 cmovne six(%rip), idx 135 cmovne seven(%rip), idx [all …]
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/arch/metag/kernel/perf/ |
D | perf_event.c | 190 struct hw_perf_event *hwc, int idx) in metag_pmu_event_update() argument 206 new_raw_count = metag_pmu->read(idx); in metag_pmu_event_update() 222 struct hw_perf_event *hwc, int idx) in metag_pmu_event_set_period() argument 251 metag_pmu->write(idx, -left & MAX_PERIOD); in metag_pmu_event_set_period() 263 int idx = hwc->idx; in metag_pmu_start() local 265 if (WARN_ON_ONCE(idx == -1)) in metag_pmu_start() 287 metag_pmu_event_set_period(event, hwc, hwc->idx); in metag_pmu_start() 288 cpuc->events[idx] = event; in metag_pmu_start() 289 metag_pmu->enable(hwc, idx); in metag_pmu_start() 301 metag_pmu_event_update(event, hwc, hwc->idx); in metag_pmu_stop() [all …]
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/arch/mips/mm/ |
D | highmem.c | 50 int idx, type; in kmap_atomic() local 58 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic() 59 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic() 61 BUG_ON(!pte_none(*(kmap_pte - idx))); in kmap_atomic() 63 set_pte(kmap_pte-idx, mk_pte(page, PAGE_KERNEL)); in kmap_atomic() 84 int idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic() local 86 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic() 92 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic() 109 int idx, type; in kmap_atomic_pfn() local 115 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_pfn() [all …]
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/arch/sh/kernel/cpu/sh4/ |
D | clock-sh4.c | 40 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local 41 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc() 50 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007; in bus_clk_recalc() local 51 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc() 60 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007; in cpu_clk_recalc() local 61 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc() 75 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument 77 if (idx < ARRAY_SIZE(sh4_clk_ops)) in arch_init_clk_ops() 78 *ops = sh4_clk_ops[idx]; in arch_init_clk_ops()
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/arch/arc/kernel/ |
D | perf_event.c | 85 static uint64_t arc_pmu_read_counter(int idx) in arc_pmu_read_counter() argument 94 write_aux_reg(ARC_REG_PCT_INDEX, idx); in arc_pmu_read_counter() 104 struct hw_perf_event *hwc, int idx) in arc_perf_event_update() argument 107 uint64_t new_raw_count = arc_pmu_read_counter(idx); in arc_perf_event_update() 121 arc_perf_event_update(event, &event->hw, event->hw.idx); in arc_pmu_read() 221 int idx = hwc->idx; in arc_pmu_event_set_period() local 246 write_aux_reg(ARC_REG_PCT_INDEX, idx); in arc_pmu_event_set_period() 265 int idx = hwc->idx; in arc_pmu_start() local 267 if (WARN_ON_ONCE(idx == -1)) in arc_pmu_start() 280 read_aux_reg(ARC_REG_PCT_INT_CTRL) | (1 << idx)); in arc_pmu_start() [all …]
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/arch/x86/crypto/sha1-mb/ |
D | sha1_mb_mgr_flush_avx2.S | 70 # idx must be a register not clobbered by sha1_x8_avx2 71 #define idx %r8 macro 116 xor idx, idx 119 cmovne one(%rip), idx 122 cmovne two(%rip), idx 125 cmovne three(%rip), idx 128 cmovne four(%rip), idx 131 cmovne five(%rip), idx 134 cmovne six(%rip), idx 137 cmovne seven(%rip), idx [all …]
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/arch/powerpc/mm/ |
D | highmem.c | 36 int idx, type; in kmap_atomic_prot() local 44 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_prot() 45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_prot() 47 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic_prot() 49 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1); in kmap_atomic_prot() 71 unsigned int idx; in __kunmap_atomic() local 73 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic() 74 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic() 80 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
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