Home
last modified time | relevance | path

Searched refs:irq_base (Results 1 – 25 of 56) sorted by relevance

123

/arch/mips/kernel/
Dirq-msc01.c27 static unsigned int irq_base; variable
34 if (irq < (irq_base + 32)) in mask_msc_irq()
35 MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base)); in mask_msc_irq()
37 MSCIC_WRITE(MSC01_IC_DISH, 1<<(irq - irq_base - 32)); in mask_msc_irq()
45 if (irq < (irq_base + 32)) in unmask_msc_irq()
46 MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base)); in unmask_msc_irq()
48 MSCIC_WRITE(MSC01_IC_ENAH, 1<<(irq - irq_base - 32)); in unmask_msc_irq()
89 do_IRQ(irq + irq_base); in ll_msc_irq()
155 irq_base = irqbase; in init_msc_irqs()
/arch/arm/mach-sa1100/
Dneponset.c69 unsigned irq_base; member
209 generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X); in neponset_irq_handler()
212 generic_handle_irq(d->irq_base + NEP_IRQ_USAR); in neponset_irq_handler()
218 generic_handle_irq(d->irq_base + NEP_IRQ_SA1111); in neponset_irq_handler()
320 d->irq_base = ret; in neponset_probe()
322 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip, in neponset_probe()
324 irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE); in neponset_probe()
325 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip, in neponset_probe()
327 irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE); in neponset_probe()
328 irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip); in neponset_probe()
[all …]
/arch/sh/cchips/hd6446x/
Dhd64461.c77 int irq_base, i; in setup_hd64461() local
90 irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1); in setup_hd64461()
91 if (IS_ERR_VALUE(irq_base)) { in setup_hd64461()
93 return irq_base; in setup_hd64461()
97 irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip, in setup_hd64461()
/arch/arm/mach-omap1/
Dirq.c196 int i, j, irq_base; in omap1_init_irq() local
230 irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0); in omap1_init_irq()
231 if (irq_base < 0) { in omap1_init_irq()
233 irq_base = 0; in omap1_init_irq()
235 omap_l2_irq = cpu_is_omap7xx() ? irq_base + 1 : irq_base; in omap1_init_irq()
238 domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0, in omap1_init_irq()
267 omap_alloc_gc(irq_banks[i].va, irq_base + i * 32, 32); in omap1_init_irq()
/arch/arm/mach-imx/
Davic.c156 int irq_base; in mxc_init_irq() local
175 irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id()); in mxc_init_irq()
176 WARN_ON(irq_base < 0); in mxc_init_irq()
179 domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0, in mxc_init_irq()
183 for (i = 0; i < AVIC_NUM_IRQS / 32; i++, irq_base += 32) in mxc_init_irq()
184 avic_init_gc(i, irq_base); in mxc_init_irq()
D3ds_debugboard.c158 int irq_base; in mxc_expio_init() local
189 irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id()); in mxc_expio_init()
190 WARN_ON(irq_base < 0); in mxc_expio_init()
192 domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0, in mxc_expio_init()
196 for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) { in mxc_expio_init()
Dtzic.c157 int irq_base; in tzic_init_dt() local
181 irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id()); in tzic_init_dt()
182 WARN_ON(irq_base < 0); in tzic_init_dt()
184 domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0, in tzic_init_dt()
188 for (i = 0; i < 4; i++, irq_base += 32) in tzic_init_dt()
189 tzic_init_gc(i, irq_base); in tzic_init_dt()
Dmach-mx31ads.c218 int irq_base; in mx31ads_init_expio() local
232 irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id()); in mx31ads_init_expio()
233 WARN_ON(irq_base < 0); in mx31ads_init_expio()
235 domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0, in mx31ads_init_expio()
239 for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) { in mx31ads_init_expio()
/arch/mips/pci/
Dpci-ar71xx.c54 int irq_base; member
241 generic_handle_irq(apc->irq_base + 0); in ar71xx_pci_irq_handler()
244 generic_handle_irq(apc->irq_base + 1); in ar71xx_pci_irq_handler()
247 generic_handle_irq(apc->irq_base + 2); in ar71xx_pci_irq_handler()
250 generic_handle_irq(apc->irq_base + 4); in ar71xx_pci_irq_handler()
264 irq = d->irq - apc->irq_base; in ar71xx_pci_irq_unmask()
281 irq = d->irq - apc->irq_base; in ar71xx_pci_irq_mask()
307 apc->irq_base = ATH79_PCI_IRQ_BASE; in ar71xx_pci_irq_init()
308 for (i = apc->irq_base; in ar71xx_pci_irq_init()
309 i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) { in ar71xx_pci_irq_init()
Dpci-ar724x.c44 int irq_base; member
241 generic_handle_irq(apc->irq_base + 0); in ar724x_pci_irq_handler()
256 offset = apc->irq_base - d->irq; in ar724x_pci_irq_unmask()
277 offset = apc->irq_base - d->irq; in ar724x_pci_irq_mask()
315 apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); in ar724x_pci_irq_init()
317 for (i = apc->irq_base; in ar724x_pci_irq_init()
318 i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { in ar724x_pci_irq_init()
/arch/arm/mach-davinci/
Dcp_intc.c122 int i, irq_base; in cp_intc_of_init() local
189 irq_base = irq_alloc_descs(-1, 0, num_irq, 0); in cp_intc_of_init()
190 if (irq_base < 0) { in cp_intc_of_init()
192 irq_base = 0; in cp_intc_of_init()
197 irq_base, 0, &cp_intc_host_ops, NULL); in cp_intc_of_init()
/arch/sh/boards/mach-se/7724/
Dirq.c117 int irq_base, i; in init_se7724_IRQ() local
127 irq_base = irq_alloc_descs(SE7724_FPGA_IRQ_BASE, SE7724_FPGA_IRQ_BASE, in init_se7724_IRQ()
129 if (IS_ERR_VALUE(irq_base)) { in init_se7724_IRQ()
135 irq_set_chip_and_handler_name(irq_base + i, &se7724_irq_chip, in init_se7724_IRQ()
/arch/arm/mach-pxa/
Dirq.c56 static inline void __iomem *irq_base(int i) in irq_base() function
127 void __iomem *base = irq_base(hw / 32); in pxa_irq_map()
160 void __iomem *base = irq_base(n >> 5); in pxa_init_irq_common()
166 __raw_writel(1, irq_base(0) + ICCR); in pxa_init_irq_common()
189 void __iomem *base = irq_base(i); in pxa_irq_suspend()
208 void __iomem *base = irq_base(i); in pxa_irq_resume()
/arch/sh/boards/mach-se/7722/
Dirq.c73 unsigned int irq_base; in se7722_gc_init() local
75 irq_base = irq_linear_revmap(se7722_irq_domain, 0); in se7722_gc_init()
77 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs, in se7722_gc_init()
/arch/sh/boards/mach-dreamcast/
Dirq.c145 int irq_base, i; in systemasic_irq_init() local
147 irq_base = irq_alloc_descs(HW_EVENT_IRQ_BASE, HW_EVENT_IRQ_BASE, in systemasic_irq_init()
149 if (IS_ERR_VALUE(irq_base)) { in systemasic_irq_init()
/arch/sh/boards/mach-se/7343/
Dirq.c74 unsigned int irq_base; in se7343_gc_init() local
76 irq_base = irq_linear_revmap(se7343_irq_domain, 0); in se7343_gc_init()
78 gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs, in se7343_gc_init()
/arch/x86/platform/intel-mid/device_libs/
Dplatform_tca6416.c42 tca6416.irq_base = gpio_base + INTEL_MID_IRQ_OFFSET; in tca6416_platform_data()
45 tca6416.irq_base = -1; in tca6416_platform_data()
Dplatform_max7315.c58 max7315->irq_base = gpio_base + INTEL_MID_IRQ_OFFSET; in max7315_platform_data()
61 max7315->irq_base = -1; in max7315_platform_data()
Dplatform_pcal9555a.c58 pcal9555a->irq_base = gpio_base + INTEL_MID_IRQ_OFFSET; in pcal9555a_platform_data()
61 pcal9555a->irq_base = -1; in pcal9555a_platform_data()
/arch/arm/mach-ep93xx/
Dvision_ep9307.c126 .irq_base = EP93XX_BOARD_IRQ(0),
131 .irq_base = -1,
136 .irq_base = -1,
141 .irq_base = -1,
/arch/arm/mach-mmp/
Djasper.c104 .irq_base = MMP_GPIO_TO_IRQ(0),
144 .irq_base = MMP_NR_IRQS,
Dttc_dkb.c80 .irq_base = MMP_GPIO_TO_IRQ(0),
144 .irq_base = MMP_NR_IRQS,
149 .irq_base = IRQ_BOARD_START,
Davengers_lite.c37 .irq_base = MMP_GPIO_TO_IRQ(0),
/arch/arm/common/
Dsa1111.c107 int irq_base; /* base for cascaded on-chip IRQs */ member
223 generic_handle_irq(i + sachip->irq_base); in sa1111_irq_handler()
227 generic_handle_irq(i + sachip->irq_base); in sa1111_irq_handler()
233 #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
234 #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
240 return BIT((d->irq - sachip->irq_base) & 31); in sa1111_irqmask()
247 return ((d->irq - sachip->irq_base) / 32) * 4; in sa1111_irqbank()
353 static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base) in sa1111_setup_irq() argument
364 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1); in sa1111_setup_irq()
373 sachip->irq_base = ret; in sa1111_setup_irq()
[all …]
Dlocomo.c67 int irq_base; member
156 irq = lchip->irq_base; in locomo_handler()
175 r &= ~(0x0010 << (d->irq - lchip->irq_base)); in locomo_mask_irq()
184 r |= (0x0010 << (d->irq - lchip->irq_base)); in locomo_unmask_irq()
197 int irq = lchip->irq_base; in locomo_setup_irq()
206 for ( ; irq <= lchip->irq_base + 3; irq++) { in locomo_setup_irq()
255 dev->irq[0] = (lchip->irq_base == NO_IRQ) ? in locomo_init_one_child()
256 NO_IRQ : lchip->irq_base + info->irq[0]; in locomo_init_one_child()
389 lchip->irq_base = (pdata) ? pdata->irq_base : NO_IRQ; in __locomo_probe()
456 if (lchip->irq != NO_IRQ && lchip->irq_base != NO_IRQ) in __locomo_probe()

123