| /arch/tile/kernel/ |
| D | irq.c | 59 #define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_K, irq_mask) argument
60 #define unmask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_RESET_K, irq_mask) argument
61 #define clear_irqs(irq_mask) __insn_mtspr(SPR_IPI_EVENT_RESET_K, irq_mask) argument
64 #define mask_irqs(irq_mask) hv_disable_intr(irq_mask) argument
65 #define unmask_irqs(irq_mask) hv_enable_intr(irq_mask) argument
66 #define clear_irqs(irq_mask) hv_clear_intr(irq_mask) argument
209 .irq_mask = tile_irq_chip_mask,
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| /arch/arm/mach-pxa/ |
| D | pxa_cplds_irqs.c | 33 unsigned int irq_mask; member
45 pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; in cplds_irq_handler()
61 fpga->irq_mask &= ~bit; in cplds_irq_mask()
62 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_irq_mask()
74 fpga->irq_mask |= bit; in cplds_irq_unmask()
75 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_irq_unmask()
81 .irq_mask = cplds_irq_mask,
106 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_resume()
138 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_probe()
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| /arch/alpha/kernel/ |
| D | sys_rx164.c | 41 volatile unsigned int *irq_mask; in rx164_update_irq_hw() local
43 irq_mask = (void *)(POLARIS_DENSE_CONFIG_BASE + 0x74); in rx164_update_irq_hw()
44 *irq_mask = mask; in rx164_update_irq_hw()
46 *irq_mask; in rx164_update_irq_hw()
64 .irq_mask = rx164_disable_irq,
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| /arch/arm/mach-omap2/ |
| D | display.c | 233 u32 v, irq_mask = 0; in dispc_disable_outputs() local
277 irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT; in dispc_disable_outputs()
281 irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT; in dispc_disable_outputs()
283 irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT | in dispc_disable_outputs()
289 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; in dispc_disable_outputs()
291 irq_mask |= 1 << FRAMEDONE3_IRQ_SHIFT; in dispc_disable_outputs()
297 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); in dispc_disable_outputs()
319 while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != in dispc_disable_outputs()
320 irq_mask) { in dispc_disable_outputs()
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| /arch/mips/loongson64/lemote-2f/ |
| D | pm.c | 58 int irq_mask; in setup_wakeup_events() local
65 irq_mask = inb(PIC_MASTER_IMR); in setup_wakeup_events()
71 outb(irq_mask & ~(1 << PIC_CASCADE_IR), PIC_MASTER_IMR); in setup_wakeup_events()
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| /arch/arm/mach-cns3xxx/ |
| D | core.c | 207 u32 irq_mask; in __cns3xxx_timer_init() local
226 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
227 irq_mask &= ~(1 << 2); in __cns3xxx_timer_init()
228 irq_mask |= 0x03; in __cns3xxx_timer_init()
229 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
241 irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
242 irq_mask |= ((1 << 3) | (1 << 4) | (1 << 5)); in __cns3xxx_timer_init()
243 writel(irq_mask, cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET); in __cns3xxx_timer_init()
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| /arch/arm/mach-iop13xx/ |
| D | irq.c | 176 .irq_mask = iop13xx_irq_mask0,
183 .irq_mask = iop13xx_irq_mask1,
190 .irq_mask = iop13xx_irq_mask2,
197 .irq_mask = iop13xx_irq_mask3,
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| /arch/arm/mach-rpc/ |
| D | irq.c | 41 .irq_mask = iomd_mask_irq_a,
65 .irq_mask = iomd_mask_irq_b,
89 .irq_mask = iomd_mask_irq_dma,
113 .irq_mask = iomd_mask_irq_fiq,
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| /arch/mips/sgi-ip32/ |
| D | ip32-irq.c | 150 .irq_mask = crime_disable_irq,
170 .irq_mask = crime_disable_irq,
203 .irq_mask = disable_macepci_irq,
302 .irq_mask = disable_maceisa_irq,
309 .irq_mask = disable_maceisa_irq,
337 .irq_mask = disable_mace_irq,
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| /arch/arm/mach-iop33x/ |
| D | irq.c | 86 .irq_mask = iop33x_irq_mask1,
93 .irq_mask = iop33x_irq_mask2,
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| /arch/mips/dec/ |
| D | ioasic-irq.c | 49 .irq_mask = mask_ioasic_irq,
66 .irq_mask = mask_ioasic_irq,
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| /arch/arm/mach-omap1/ |
| D | fpga.c | 112 .irq_mask = fpga_mask_irq,
120 .irq_mask = fpga_mask_irq,
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| /arch/mips/sgi-ip22/ |
| D | ip22-int.c | 50 .irq_mask = disable_local0_irq,
69 .irq_mask = disable_local1_irq,
88 .irq_mask = disable_local2_irq,
107 .irq_mask = disable_local3_irq,
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| /arch/arm/mach-ks8695/ |
| D | irq.c | 132 .irq_mask = ks8695_irq_mask,
139 .irq_mask = ks8695_irq_mask,
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| /arch/arm/plat-orion/ |
| D | irq.c | 35 ct->chip.irq_mask = irq_gc_mask_clr_bit; in orion_irq_init()
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| /arch/arm/kernel/ |
| D | machine_kexec.c | 137 if (chip->irq_mask) in machine_kexec_mask_interrupts()
138 chip->irq_mask(&desc->irq_data); in machine_kexec_mask_interrupts()
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| /arch/mips/kernel/ |
| D | irq-msc01.c | 104 .irq_mask = mask_msc_irq,
113 .irq_mask = mask_msc_irq,
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| D | irq-rm7000.c | 33 .irq_mask = mask_rm7k_irq,
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| /arch/powerpc/sysdev/ |
| D | mv64x60_pic.c | 107 .irq_mask = mv64x60_mask_low,
144 .irq_mask = mv64x60_mask_high,
196 .irq_mask = mv64x60_mask_gpp,
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| /arch/powerpc/platforms/52xx/ |
| D | mpc52xx_pic.c | 206 .irq_mask = mpc52xx_extirq_mask,
234 .irq_mask = mpc52xx_main_mask,
257 .irq_mask = mpc52xx_periph_mask,
286 .irq_mask = mpc52xx_sdma_mask,
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| /arch/powerpc/include/asm/ |
| D | fsl_pm.h | 29 void (*irq_mask)(int cpu); member
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| /arch/arm/mach-footbridge/ |
| D | isa-irq.c | 57 .irq_mask = isa_mask_pic_lo_irq,
86 .irq_mask = isa_mask_pic_hi_irq,
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| /arch/m68k/coldfire/ |
| D | intc-simr.c | 164 .irq_mask = intc_irq_mask,
171 .irq_mask = intc_irq_mask,
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| /arch/mips/loongson64/common/ |
| D | bonito-irq.c | 33 .irq_mask = bonito_irq_disable,
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| /arch/x86/kernel/apic/ |
| D | msi.c | 64 .irq_mask = pci_msi_mask_irq,
162 .irq_mask = pci_msi_mask_irq,
202 .irq_mask = dmar_msi_mask,
299 .irq_mask = hpet_msi_mask,
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