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/arch/hexagon/include/asm/
Dmmu_context.h71 int l1; in switch_mm() local
78 for (l1 = MIN_KERNEL_SEG; l1 <= max_kernel_seg; l1++) in switch_mm()
79 next->pgd[l1] = init_mm.pgd[l1]; in switch_mm()
/arch/sparc/kernel/
Drtrap_64.S44 andn %l1, %o0, %l1
58 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
60 and %l1, %l4, %l4
62 andn %l1, %l4, %l1
68 rtrap_nmi: ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
70 and %l1, %l4, %l4
71 andn %l1, %l4, %l1
87 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
90 and %l1, %l4, %l4
91 andn %l1, %l4, %l1
[all …]
Dhead_64.S169 mov (1b - prom_peer_name), %l1
170 sub %l0, %l1, %l1
174 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "peer"
184 mov (1b - prom_root_node), %l1
185 sub %l0, %l1, %l1
186 stw %l4, [%l1]
188 mov (1b - prom_getprop_name), %l1
191 sub %l0, %l1, %l1
198 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "getprop"
212 mov (1b - prom_finddev_name), %l1
[all …]
Dhead_32.S126 mov %o1, %l1 ! stash away debug_vec too
317 sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
341 sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
364 mov %l1, %o1 ! and debug_vec
375 add %g7, 0x1c, %l1
376 ld [%l1], %l0
386 ld [%l1], %l0 ! 'compatible' tells
407 ldub [%o2], %l1
408 cmp %l1, 'l'
413 ldub [%o2 + 0x4], %l1
[all …]
Dentry.S162 jmp %l1
437 ld [%l1], %l5
448 mov %l1, %o1
468 mov %l1, %o1
488 ld [%l1], %o1
500 ld [%l1], %o1
516 mov %l1, %o1
528 cmp %l1, %l5
532 cmp %l1, %l5
555 mov %l1, %o1
[all …]
Dhvtramp.S56 mov 0, %l1
70 add %l1, 1, %l1
71 cmp %l1, %l2
Dsyscalls.S121 ldx [%sp + PTREGS_OFF + PT_V9_G1], %l1
122 call %l1
274 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
282 add %l1, 0x4, %l2 ! npc = npc+4
283 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
293 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
305 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
/arch/blackfin/kernel/
Dvmlinux.lds.S51 *(.l1.text)
75 *(.l1.bss)
78 *(.l1.bss.B)
97 *(.l1.data)
100 *(.l1.data.B)
178 *(.l1.text.head)
179 *(.l1.text)
194 *(.l1.data)
202 *(.l1.bss)
214 *(.l1.data.B)
[all …]
/arch/sparc/prom/
Dcif.S20 mov %g5, %l1
25 mov %l1, %g5
43 mov %o0, %l1
47 restore %l1, 0, %o0
/arch/c6x/lib/
Dnegll.S25 mvk .l1 0,A0
26 subu .l1 A0,A4,A3:A2
27 sub .l1 A0,A5,A0
29 add .l1 A5,A0,A5
Ddivremi.S23 || cmpgt .l1 0, A4, A1
28 [A1] neg .l1 A4, A4
37 neg .l1 A4, A4
44 sub .l1 A5, A6, A5
Dllshru.S28 cmplt .l1 0,A0,A2
31 [!A2] neg .l1 A0,A4
35 || [!A2] mvk .l1 0,A5
Dllshl.S28 cmplt .l1 0,A0,A2
30 [!A2] neg .l1 A0,A5
34 || [!A2] mvk .l1 0,A4
Dremi.S41 || cmpgt .l1 0, A4, A1
46 [A1] neg .l1 A4, A4
55 neg .l1 A4, A4
62 sub .l1 A5, A6, A4
Ddivi.S41 || cmpgt .l1 0, A4, A1
44 [A1] neg .l1 A4, A4
49 neg .l1 A4, A4
/arch/sparc/lib/
Dxor.S390 xor %l3, %l1, %l3
431 xor %l1, %i5, %l1
433 xor %o3, %l1, %o3
449 xor %l1, %i5, %l1
451 xor %o3, %l1, %o3
490 xor %l1, %g3, %l1
492 stxa %l1, [%i0 + 0x08] %asi
503 xor %l1, %g3, %l1
505 stxa %l1, [%i0 + 0x18] %asi
516 xor %l1, %g3, %l1
[all …]
Dmcount.S62 mov %g3, %l1
88 mov %g3, %l1
114 mov %l1, %o2
/arch/x86/boot/
Dstring.c162 size_t l1, l2; in strstr() local
167 l1 = strlen(s1); in strstr()
168 while (l1 >= l2) { in strstr()
169 l1--; in strstr()
/arch/s390/lib/
Dstring.c241 static inline int clcle(const char *s1, unsigned long l1, in clcle() argument
245 register unsigned long r3 asm("3") = (unsigned long) l1; in clcle()
266 int l1, l2; in strstr() local
271 l1 = __strend(s1) - s1; in strstr()
272 while (l1-- >= l2) { in strstr()
/arch/sparc/power/
Dhibernate_asm.S75 ldxa [%l0 ] %asi, %l1 /* address */
79 sub %l1, %g7, %l1
84 ldxa [%l1 + %l3] ASI_PHYS_USE_EC, %g2
/arch/blackfin/include/asm/
Dcontext.S38 [--sp] = l1;
85 l1 = r0; define
110 [--sp] = l1;
145 l1 = r0; define
169 [--sp] = l1;
220 l1 = r0; define
258 l1 = [sp++]; define
328 l1 = [sp++]; define
/arch/arm/mach-omap1/
Dirq.c146 void __iomem *l1 = irq_banks[0].va; in omap1_handle_irq() local
151 irqnr = readl_relaxed(l1 + IRQ_ITR_REG_OFFSET); in omap1_handle_irq()
152 irqnr &= ~(readl_relaxed(l1 + IRQ_MIR_REG_OFFSET) & 0xffffffff); in omap1_handle_irq()
156 irqnr = readl_relaxed(l1 + IRQ_SIR_FIQ_REG_OFFSET); in omap1_handle_irq()
160 irqnr = readl_relaxed(l1 + IRQ_SIR_IRQ_REG_OFFSET); in omap1_handle_irq()
/arch/microblaze/lib/
Dmulsi3.S27 bri l1
30 l1: label
/arch/blackfin/mach-common/
Dcache.S66 .section .l1.text
97 .section .l1.text
/arch/sparc/include/asm/
Dttable.h20 clr %l0; clr %l1; clr %l2; clr %l3; \
178 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
179 add %l1, 4, %l2; \
180 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
243 stx %l1, [%sp + STACK_BIAS + 0x08]; \
264 stx %l1, [%sp + STACK_BIAS + 0x08]; \
291 stxa %l1, [%g1 + %g3] ASI; \
322 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
356 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
387 stwa %l1, [%sp + %g3] ASI; \
[all …]

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