| /arch/arm/lib/ |
| D | memzero.S | 51 str lr, [sp, #-4]! @ 1
54 UNWIND( .save {lr} )
56 mov lr, r2 @ 1
59 stmgeia r0!, {r2, r3, ip, lr} @ 4
60 stmgeia r0!, {r2, r3, ip, lr} @ 4
61 stmgeia r0!, {r2, r3, ip, lr} @ 4
62 stmgeia r0!, {r2, r3, ip, lr} @ 4
69 stmneia r0!, {r2, r3, ip, lr} @ 4
70 stmneia r0!, {r2, r3, ip, lr} @ 4
72 stmneia r0!, {r2, r3, ip, lr} @ 4
[all …]
|
| D | memset.S | 39 stmfd sp!, {r8, lr}
42 UNWIND( .save {r8, lr} )
44 mov lr, r3
47 stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
48 stmgeia ip!, {r1, r3, r8, lr}
49 stmgeia ip!, {r1, r3, r8, lr}
50 stmgeia ip!, {r1, r3, r8, lr}
57 stmneia ip!, {r1, r3, r8, lr}
58 stmneia ip!, {r1, r3, r8, lr}
60 stmneia ip!, {r1, r3, r8, lr}
[all …]
|
| D | delay-loop.S | 35 reteq lr
43 retls lr
45 retls lr
47 retls lr
49 retls lr
51 retls lr
53 retls lr
55 retls lr
59 ret lr
|
| D | copy_page.S | 28 stmfd sp!, {r4, lr} @ 2
32 ldmia r1!, {r3, r4, ip, lr} @ 4+1
37 stmia r0!, {r3, r4, ip, lr} @ 4
38 ldmia r1!, {r3, r4, ip, lr} @ 4
41 stmia r0!, {r3, r4, ip, lr} @ 4
42 ldmgtia r1!, {r3, r4, ip, lr} @ 4
44 PLD( ldmeqia r1!, {r3, r4, ip, lr} )
|
| D | io-writesl.S | 15 reteq lr
21 stmfd sp!, {r4, lr}
22 1: ldmia r1!, {r3, r4, ip, lr}
27 str lr, [r0, #0]
29 ldmfd sp!, {r4, lr}
36 ret lr
50 ret lr
58 ret lr
66 ret lr
|
| D | memmove.S | 37 stmfd sp!, {r0, r4, lr}
41 UNWIND( .save {r0, r4, lr} ) @ in first stmfd block
57 UNWIND( .save {r0, r4, lr} )
77 4: ldmdb r1!, {r3, r4, r5, r6, r7, r8, ip, lr}
79 stmdb r0!, {r3, r4, r5, r6, r7, r8, ip, lr}
95 W(ldr) lr, [r1, #-4]!
106 W(str) lr, [r0, #-4]!
114 UNWIND( .save {r0, r4, lr} ) @ still in first stmfd block
128 ldrb lr, [r1, #-1]!
132 strb lr, [r0, #-1]!
[all …]
|
| D | call_with_stack.S | 32 str lr, [r2, #-4]!
38 badr lr, 1f
41 1: ldr lr, [sp]
43 ret lr
|
| D | copy_template.S | 77 enter r4, lr
81 usave r4, lr @ in first stmdb block
96 usave r4, lr
116 4: ldr8w r1, r3, r4, r5, r6, r7, r8, ip, lr, abort=20f
118 str8w r0, r3, r4, r5, r6, r7, r8, ip, lr, abort=20f
140 ldr1w r1, lr, abort=20f
158 str1w r0, lr, abort=20f
166 usave r4, lr @ still in first stmdb block
181 ldr1b r1, lr, abort=21f
185 str1b r0, lr, abort=21f
[all …]
|
| D | io-writesb.S | 23 mov lr, \rd, lsr #24
24 strb lr, [r0]
25 mov lr, \rd, lsr #16
26 strb lr, [r0]
27 mov lr, \rd, lsr #8
28 strb lr, [r0]
48 reteq lr
53 stmfd sp!, {r4, r5, lr}
|
| D | getuser.S | 39 ret lr
69 ret lr
77 ret lr
91 ret lr
105 ret lr
113 ret lr
130 ret lr
138 ret lr
148 ret lr
|
| D | io-readsl.S | 15 reteq lr
21 stmfd sp!, {r4, lr}
25 ldr lr, [r0, #0]
27 stmia r1!, {r3, r4, ip, lr}
29 ldmfd sp!, {r4, lr}
36 ret lr
78 ret lr
|
| D | lib1funcs.S | 217 reteq lr
227 ret lr
231 ret lr
236 ret lr
251 retls lr
255 ret lr
285 ret lr
289 ret lr
294 ret lr
301 ret lr
[all …]
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| D | putuser.S | 39 ret lr
61 ret lr
68 ret lr
81 ret lr
86 ret lr
|
| /arch/arm/kernel/ |
| D | entry-ftrace.S | 88 1: mcount_get_lr r1 @ lr of instrumented func
89 mcount_adjust_addr r0, lr @ instrumented function
90 badr lr, 2f
103 @ before the push {lr} of the mcount mechanism
105 str lr, [sp, #0] @ store LR instead of PC
107 ldr lr, [sp, #8] @ get previous LR
111 stmdb sp!, {ip, lr}
112 stmdb sp!, {r0-r11, lr}
124 ldr r1, [sp, #S_LR] @ lr of instrumented func
126 ldr lr, [sp, #S_PC] @ get LR
[all …]
|
| /arch/arm/mach-mvebu/ |
| D | coherency_ll.S | 57 ret lr
74 ret lr
94 mov r0, lr
100 mov lr, r0
108 ret lr
119 mov r0, lr
125 mov lr, r0
135 ret lr
146 mov r0, lr
152 mov lr, r0
[all …]
|
| /arch/arm/include/asm/ |
| D | entry-macro-multi.S | 8 get_irqnr_preamble r6, lr
9 1: get_irqnr_and_base r0, r2, r6, lr
14 badrne lr, 1b
24 ALT_SMP(test_for_ipi r0, r2, r6, lr)
27 badrne lr, 1b
37 mov r8, lr
|
| /arch/arm/kvm/hyp/ |
| D | hyp-entry.S | 172 mrs lr, cpsr
173 bic lr, lr, #MODE_MASK
174 orr lr, lr, #SVC_MODE
175 THUMB( orr lr, lr, #PSR_T_BIT )
176 msr spsr_cxsf, lr
177 ldr lr, =panic
178 msr ELR_hyp, lr
179 ldr lr, =kvm_call_hyp
244 push {r2, lr}
246 mov lr, r0
[all …]
|
| D | entry.S | 35 str lr, [r1, #4] @ Skip SP_usr (already saved)
39 ldr lr, [r0, #S_LR]
56 str lr, [r2, #4]
64 ldr lr, [r0, #4]
97 bx lr
108 push {r3, r4, lr}
|
| /arch/tile/kernel/ |
| D | entry.S | 27 { move r0, lr; jrp lr }
31 { move r2, lr; lnk r1 }
34 jrp lr /* keep backtracer happy */
42 jrp lr /* clue in the backtracer */
63 jrp lr
|
| /arch/arm/mm/ |
| D | proc-v7m.S | 20 ret lr
24 ret lr
50 ret lr
54 ret lr
61 ret lr
69 ret lr
73 ret lr
87 ret lr
96 ret lr
136 mov r6, lr @ save LR
[all …]
|
| D | cache-v4.S | 22 ret lr
44 ret lr
63 ret lr
93 ret lr
120 ret lr
140 ret lr
|
| /arch/metag/kernel/ |
| D | stacktrace.c | 42 unsigned long lr; in unwind_frame() local
49 lr = fp->lr - 4; in unwind_frame()
59 if (tbi_boing_size && lr >= tbi_boing_addr && in unwind_frame()
60 lr < tbi_boing_addr + tbi_boing_size) { in unwind_frame()
65 lr = regs->ctx.DX[4].U1; in unwind_frame()
76 frame->pc = lr; in unwind_frame()
89 unsigned long addr = sp->lr - 4; in unwind_frame()
164 frame.lr = 0; /* recovered from the stack */ in save_stack_trace_tsk()
173 frame.lr = (unsigned long)__builtin_return_address(0); in save_stack_trace_tsk()
|
| /arch/arm/boot/compressed/ |
| D | ll_char_wr.S | 36 stmfd sp!, {r4 - r7, lr}
38 @ Smashable regs: {r0 - r3}, [r4 - r7], (r8 - fp), [ip], (sp), [lr], (pc)
48 ldmia ip, {r3, r4, r5, r6, lr}
51 add lr, lr, ip
65 @ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
68 ldr r7, [lr, r7, lsl #2]
73 ldr r7, [lr, r7, lsl #2]
83 @ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
87 ldr ip, [lr, ip, lsl #2]
90 ldr ip, [lr, ip, lsl #2] @ avoid r4
[all …]
|
| /arch/arm/mach-tegra/ |
| D | reset-handler.S | 185 ldr lr, [r12, #RESET_DATA(STARTUP_LP1)]
186 cmp lr, #0
188 THUMB( add lr, lr, #1 ) @ switch to Thumb mode
189 bx lr
196 ldr lr, [r12, #RESET_DATA(STARTUP_LP2)]
197 cmp lr, #0
199 bx lr
213 ldr lr, [r12, #RESET_DATA(STARTUP_SECONDARY)]
214 cmp lr, #0
216 bx lr
[all …]
|
| /arch/arm/mach-omap2/ |
| D | omap-smc.S | 28 stmfd sp!, {r2-r12, lr}
45 stmfd sp!, {r4-r12, lr}
68 stmfd sp!, {r4-r11, lr}
77 stmfd sp!, {r1-r12, lr}
85 stmfd sp!, {r2-r12, lr}
93 stmfd sp!, {r2-r12, lr}
|