/arch/alpha/math-emu/ |
D | qrnnd.S | 44 #define n0 $18 macro 52 $loop1: cmplt n0,0,tmp 55 addq n0,n0,n0 59 bis n0,qb,n0 60 cmplt n0,0,tmp 63 addq n0,n0,n0 67 bis n0,qb,n0 68 cmplt n0,0,tmp 71 addq n0,n0,n0 75 bis n0,qb,n0 [all …]
|
D | sfp-util.h | 21 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 23 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
|
/arch/powerpc/math-emu/ |
D | udivmodti4.c | 11 _FP_W_TYPE n1, _FP_W_TYPE n0, in _fp_udivmodti4() argument 24 udiv_qrnnd (q0, n0, n1, n0, d0); in _fp_udivmodti4() 37 udiv_qrnnd (q0, n0, n1, n0, d0); in _fp_udivmodti4() 42 r0 = n0; in _fp_udivmodti4() 59 n1 = (n1 << bm) | (n0 >> (_FP_W_TYPE_SIZE - bm)); in _fp_udivmodti4() 60 n0 = n0 << bm; in _fp_udivmodti4() 63 udiv_qrnnd (q0, n0, n1, n0, d0); in _fp_udivmodti4() 99 n1 = (n1 << bm) | (n0 >> b); in _fp_udivmodti4() 100 n0 = n0 << bm; in _fp_udivmodti4() 107 udiv_qrnnd (q0, n0, n1, n0, d0); in _fp_udivmodti4() [all …]
|
/arch/mips/ralink/ |
D | rt288x.c | 86 u32 n0; in prom_soc_init() local 90 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); in prom_soc_init() 94 if (n0 == RT2880_CHIP_NAME0 && n1 == RT2880_CHIP_NAME1) { in prom_soc_init() 98 panic("rt288x: unknown SoC, n0:%08x n1:%08x", n0, n1); in prom_soc_init()
|
D | rt305x.c | 218 u32 n0; in prom_soc_init() local 222 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); in prom_soc_init() 225 if (n0 == RT3052_CHIP_NAME0 && n1 == RT3052_CHIP_NAME1) { in prom_soc_init() 238 } else if (n0 == RT3350_CHIP_NAME0 && n1 == RT3350_CHIP_NAME1) { in prom_soc_init() 242 } else if (n0 == RT3352_CHIP_NAME0 && n1 == RT3352_CHIP_NAME1) { in prom_soc_init() 246 } else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) { in prom_soc_init() 251 panic("rt305x: unknown SoC, n0:%08x n1:%08x", n0, n1); in prom_soc_init()
|
D | rt3883.c | 122 u32 n0; in prom_soc_init() local 126 n0 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID0_3); in prom_soc_init() 130 if (n0 == RT3883_CHIP_NAME0 && n1 == RT3883_CHIP_NAME1) { in prom_soc_init() 134 panic("rt3883: unknown SoC, n0:%08x n1:%08x", n0, n1); in prom_soc_init()
|
D | mt7621.c | 169 u32 n0; in prom_soc_init() local 195 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); in prom_soc_init() 198 if (n0 == MT7621_CHIP_NAME0 && n1 == MT7621_CHIP_NAME1) { in prom_soc_init() 202 panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1); in prom_soc_init()
|
D | mt7620.c | 648 u32 n0; in prom_soc_init() local 656 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); in prom_soc_init() 661 if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) { in prom_soc_init() 671 } else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) { in prom_soc_init() 683 panic("mt762x: unknown SoC, n0:%08x n1:%08x\n", n0, n1); in prom_soc_init()
|
/arch/sparc/math-emu/ |
D | sfp-util_64.h | 76 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 85 __r1 = (__r1 << 32) | (n0 >> 32); \ 98 __r0 = (__r0 << 32) | ((USItype)n0); \
|
D | sfp-util_32.h | 77 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 106 "0" ((USItype)(n0)) : "%g1", "cc")
|
/arch/sh/math-emu/ |
D | sfp-util.h | 32 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 42 __r1 = __r1 * __ll_B | __ll_highpart (n0); \ 55 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
|
/arch/alpha/kernel/ |
D | perf_event.c | 437 int n0; in alpha_pmu_add() local 456 n0 = cpuc->n_events; in alpha_pmu_add() 457 if (n0 < alpha_pmu->num_pmcs) { in alpha_pmu_add() 458 cpuc->event[n0] = event; in alpha_pmu_add() 459 cpuc->evtype[n0] = event->hw.event_base; in alpha_pmu_add() 460 cpuc->current_idx[n0] = PMC_NO_INDEX; in alpha_pmu_add() 462 if (!alpha_check_constraints(cpuc->event, cpuc->evtype, n0+1)) { in alpha_pmu_add()
|
/arch/powerpc/include/asm/ |
D | sfp-machine.h | 280 #define udiv_qrnnd(q, r, n1, n0, d) \ argument 290 __r1 = __r1 * __ll_B | __ll_highpart (n0); \ 303 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
|
/arch/powerpc/perf/ |
D | core-book3s.c | 1477 int n0; in power_pmu_add() local 1488 n0 = cpuhw->n_events; in power_pmu_add() 1489 if (n0 >= ppmu->n_counter) in power_pmu_add() 1491 cpuhw->event[n0] = event; in power_pmu_add() 1492 cpuhw->events[n0] = event->hw.config; in power_pmu_add() 1493 cpuhw->flags[n0] = event->hw.event_base; in power_pmu_add() 1514 if (check_excludes(cpuhw->event, cpuhw->flags, n0, 1)) in power_pmu_add() 1516 if (power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n0 + 1)) in power_pmu_add() 1518 event->hw.config = cpuhw->events[n0]; in power_pmu_add()
|
/arch/sparc/kernel/ |
D | perf_event.c | 1375 int n0, ret = -EAGAIN; in sparc_pmu_add() local 1380 n0 = cpuc->n_events; in sparc_pmu_add() 1381 if (n0 >= sparc_pmu->max_hw_events) in sparc_pmu_add() 1384 cpuc->event[n0] = event; in sparc_pmu_add() 1385 cpuc->events[n0] = event->hw.event_base; in sparc_pmu_add() 1386 cpuc->current_idx[n0] = PIC_NO_INDEX; in sparc_pmu_add() 1400 if (check_excludes(cpuc->event, n0, 1)) in sparc_pmu_add() 1402 if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1)) in sparc_pmu_add()
|
/arch/x86/events/ |
D | core.c | 1191 int n, n0, ret; in x86_pmu_add() local 1195 n0 = cpuc->n_events; in x86_pmu_add() 1230 cpuc->n_added += n - n0; in x86_pmu_add() 1231 cpuc->n_txn += n - n0; in x86_pmu_add()
|