| /arch/powerpc/include/asm/ |
| D | head-64.h | 12 .macro define_ftsec name
15 .macro define_data_ftsec name
18 .macro use_ftsec name
116 #define __FIXED_SECTION_ENTRY_BEGIN(sname, name, __align) \
119 .global name; \
120 name:
122 #define FIXED_SECTION_ENTRY_BEGIN(sname, name) \
123 __FIXED_SECTION_ENTRY_BEGIN(sname, name, IFETCH_ALIGN_BYTES)
125 #define FIXED_SECTION_ENTRY_BEGIN_LOCATION(sname, name, start, size) \
127 name##_start = (start); \
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| D | vdso.h | 32 #define V_FUNCTION_BEGIN(name) \ argument
33 .globl name; \
36 name: \
37 .quad .name,.TOC.@tocbase,0; \
39 .globl .name; \
40 .type .name,@function; \
41 .name: \
43 #define V_FUNCTION_END(name) \ argument
44 .size .name,.-.name;
46 #define V_LOCAL_FUNC(name) (.name) argument
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| /arch/arm/mach-omap2/ |
| D | clockdomains33xx_data.c | 26 .name = "l4ls_clkdm",
27 .pwrdm = { .name = "per_pwrdm" },
34 .name = "l3s_clkdm",
35 .pwrdm = { .name = "per_pwrdm" },
42 .name = "l4fw_clkdm",
43 .pwrdm = { .name = "per_pwrdm" },
50 .name = "l3_clkdm",
51 .pwrdm = { .name = "per_pwrdm" },
58 .name = "l4hs_clkdm",
59 .pwrdm = { .name = "per_pwrdm" },
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| D | powerdomains3xxx_data.c | 36 .name = "iva2_pwrdm",
53 .voltdm = { .name = "mpu_iva" },
57 .name = "mpu_pwrdm",
69 .voltdm = { .name = "mpu_iva" },
73 .name = "mpu_pwrdm",
85 .voltdm = { .name = "mpu_iva" },
99 .name = "core_pwrdm",
112 .voltdm = { .name = "core" },
116 .name = "core_pwrdm",
134 .voltdm = { .name = "core" },
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| D | clockdomains43xx_data.c | 19 .name = "l4_cefuse_clkdm",
20 .pwrdm = { .name = "cefuse_pwrdm" },
28 .name = "mpu_clkdm",
29 .pwrdm = { .name = "mpu_pwrdm" },
37 .name = "l4ls_clkdm",
38 .pwrdm = { .name = "per_pwrdm" },
46 .name = "tamper_clkdm",
47 .pwrdm = { .name = "tamper_pwrdm" },
55 .name = "l4_rtc_clkdm",
56 .pwrdm = { .name = "rtc_pwrdm" },
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| D | clockdomains81xx_data.c | 39 .name = "alwon_l3s_clkdm",
40 .pwrdm = { .name = "alwon_pwrdm" },
47 .name = "alwon_l3_med_clkdm",
48 .pwrdm = { .name = "alwon_pwrdm" },
55 .name = "alwon_l3_fast_clkdm",
56 .pwrdm = { .name = "alwon_pwrdm" },
63 .name = "alwon_ethernet_clkdm",
64 .pwrdm = { .name = "alwon_pwrdm" },
71 .name = "mmu_clkdm",
72 .pwrdm = { .name = "alwon_pwrdm" },
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| D | clockdomains3xxx_data.c | 223 .name = "mpu_clkdm",
224 .pwrdm = { .name = "mpu_pwrdm" },
232 .name = "mpu_clkdm",
233 .pwrdm = { .name = "mpu_pwrdm" },
241 .name = "neon_clkdm",
242 .pwrdm = { .name = "neon_pwrdm" },
249 .name = "iva2_clkdm",
250 .pwrdm = { .name = "iva2_pwrdm" },
258 .name = "gfx_clkdm",
259 .pwrdm = { .name = "gfx_pwrdm" },
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| D | clockdomains54xx_data.c | 168 .name = "l4sec_clkdm",
169 .pwrdm = { .name = "core_pwrdm" },
180 .name = "iva_clkdm",
181 .pwrdm = { .name = "iva_pwrdm" },
192 .name = "mipiext_clkdm",
193 .pwrdm = { .name = "core_pwrdm" },
203 .name = "l3main2_clkdm",
204 .pwrdm = { .name = "core_pwrdm" },
213 .name = "l3main1_clkdm",
214 .pwrdm = { .name = "core_pwrdm" },
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| D | powerdomains44xx_data.c | 35 .name = "core_pwrdm",
36 .voltdm = { .name = "core" },
61 .name = "gfx_pwrdm",
62 .voltdm = { .name = "core" },
78 .name = "abe_pwrdm",
79 .voltdm = { .name = "iva" },
98 .name = "dss_pwrdm",
99 .voltdm = { .name = "core" },
116 .name = "tesla_pwrdm",
117 .voltdm = { .name = "iva" },
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| D | clockdomains44xx_data.c | 157 .name = "l4_cefuse_clkdm",
158 .pwrdm = { .name = "cefuse_pwrdm" },
166 .name = "l4_cfg_clkdm",
167 .pwrdm = { .name = "core_pwrdm" },
176 .name = "tesla_clkdm",
177 .pwrdm = { .name = "tesla_pwrdm" },
188 .name = "l3_gfx_clkdm",
189 .pwrdm = { .name = "gfx_pwrdm" },
200 .name = "ivahd_clkdm",
201 .pwrdm = { .name = "ivahd_pwrdm" },
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| D | clockdomains7xx_data.c | 316 .name = "l4per3_clkdm",
317 .pwrdm = { .name = "l4per_pwrdm" },
326 .name = "l4per2_clkdm",
327 .pwrdm = { .name = "l4per_pwrdm" },
338 .name = "mpu0_clkdm",
339 .pwrdm = { .name = "cpu0_pwrdm" },
347 .name = "iva_clkdm",
348 .pwrdm = { .name = "iva_pwrdm" },
359 .name = "coreaon_clkdm",
360 .pwrdm = { .name = "coreaon_pwrdm" },
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| D | powerdomains54xx_data.c | 33 .name = "core_pwrdm",
34 .voltdm = { .name = "core" },
59 .name = "abe_pwrdm",
60 .voltdm = { .name = "core" },
79 .name = "coreaon_pwrdm",
80 .voltdm = { .name = "core" },
88 .name = "dss_pwrdm",
89 .voltdm = { .name = "core" },
106 .name = "cpu0_pwrdm",
107 .voltdm = { .name = "mpu" },
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| D | clockdomains2420_data.c | 80 .name = "mpu_clkdm",
81 .pwrdm = { .name = "mpu_pwrdm" },
88 .name = "iva1_clkdm",
89 .pwrdm = { .name = "dsp_pwrdm" },
97 .name = "dsp_clkdm",
98 .pwrdm = { .name = "dsp_pwrdm" },
104 .name = "gfx_clkdm",
105 .pwrdm = { .name = "gfx_pwrdm" },
112 .name = "core_l3_clkdm",
113 .pwrdm = { .name = "core_pwrdm" },
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| /arch/tile/include/asm/ |
| D | linkage.h | 29 #define STD_ENTRY(name) \ argument
30 .pushsection .text.##name, "ax"; \
31 ENTRY(name); \
32 FEEDBACK_ENTER(name)
34 #define STD_ENTRY_SECTION(name, section) \ argument
36 ENTRY(name); \
37 FEEDBACK_ENTER_EXPLICIT(name, section, .Lend_##name - name)
39 #define STD_ENDPROC(name) \ argument
40 ENDPROC(name); \
41 .Lend_##name:; \
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| /arch/mips/bcm63xx/boards/ |
| D | board_bcm963xx.c | 45 .name = "CVG834G_E15R3921",
61 .name = "CVG834G:green:power",
77 .name = "96328avng",
91 .name = "96328avng::ppp-fail",
96 .name = "96328avng::power",
102 .name = "96328avng::power-fail",
107 .name = "96328avng::wps",
112 .name = "96328avng::ppp",
125 .name = "96338GW",
139 .name = "adsl",
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| /arch/mips/include/asm/ |
| D | mips-cps.h | 20 #define CPS_ACCESSOR_A(unit, off, name) \ argument
21 static inline void *addr_##unit##_##name(void) \
26 #define CPS_ACCESSOR_R(unit, sz, name) \ argument
27 static inline uint##sz##_t read_##unit##_##name(void) \
33 return __raw_readl(addr_##unit##_##name()); \
37 return __raw_readq(addr_##unit##_##name()); \
39 val64 = __raw_readl(addr_##unit##_##name() + 4); \
41 val64 |= __raw_readl(addr_##unit##_##name()); \
49 #define CPS_ACCESSOR_W(unit, sz, name) \ argument
50 static inline void write_##unit##_##name(uint##sz##_t val) \
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| D | mips-gic.h | 34 #define GIC_ACCESSOR_RO(sz, off, name) \ argument
35 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
38 #define GIC_ACCESSOR_RW(sz, off, name) \ argument
39 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
42 #define GIC_VX_ACCESSOR_RO(sz, off, name) \ argument
43 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name) \
44 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
47 #define GIC_VX_ACCESSOR_RW(sz, off, name) \ argument
48 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name) \
49 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
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| /arch/powerpc/xmon/ |
| D | ansidecl.h | 109 #define EXFUN(name, proto) name proto argument
110 #define DEFUN(name, arglist, args) name(args) argument
111 #define DEFUN_VOID(name) name(void) argument
113 #define PROTO(type, name, arglist) type name arglist argument
133 #define EXFUN(name, proto) name() argument
134 #define DEFUN(name, arglist, args) name arglist args; argument
135 #define DEFUN_VOID(name) name() argument
136 #define PROTO(type, name, arglist) type name () argument
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| /arch/parisc/include/asm/ |
| D | linkage.h | 20 #define ENTRY(name) \
21 .export name !\
23 name:
26 #define ENDPROC(name) \
27 END(name)
29 #define ENDPROC(name) \
30 .type name, @function !\
31 END(name)
34 #define ENTRY_CFI(name) \
35 ENTRY(name) ASM_NL\
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| /arch/c6x/include/asm/ |
| D | linkage.h | 11 #define ENTRY(name) \
12 .global name @ \
14 name:
16 #define ENTRY(name) \
17 .global name @ \
18 .hidden name @ \
20 name:
23 #define ENDPROC(name) \
24 .type name, @function @ \
25 .size name, . - name
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| /arch/mips/ar7/ |
| D | platform.c | 103 .name = "regs",
109 .name = "irq",
115 .name = "mem",
121 .name = "devirq",
130 .name = "regs",
136 .name = "irq",
142 .name = "mem",
148 .name = "devirq",
175 .name = "vlynq",
185 .name = "vlynq",
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| /arch/arm/plat-samsung/include/plat/ |
| D | iic-core.h | 22 static inline void s3c_i2c0_setname(char *name) in s3c_i2c0_setname() argument
25 s3c_device_i2c0.name = name; in s3c_i2c0_setname()
28 static inline void s3c_i2c1_setname(char *name) in s3c_i2c1_setname() argument
31 s3c_device_i2c1.name = name; in s3c_i2c1_setname()
35 static inline void s3c_i2c2_setname(char *name) in s3c_i2c2_setname() argument
38 s3c_device_i2c2.name = name; in s3c_i2c2_setname()
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| /arch/s390/kernel/ |
| D | irq.c | 36 char *name; member
51 {.irq = EXT_INTERRUPT, .name = "EXT"},
52 {.irq = IO_INTERRUPT, .name = "I/O"},
53 {.irq = THIN_INTERRUPT, .name = "AIO"},
62 {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
63 {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
64 {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
65 {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
66 {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
67 {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
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| /arch/powerpc/kvm/ |
| D | fpu.S | 32 #define FPS_ONE_IN(name) \ argument
33 _GLOBAL(fps_ ## name); \
38 name 0,0; \
53 #define FPS_TWO_IN(name) \ argument
54 _GLOBAL(fps_ ## name); \
60 name 0,0,1; \
76 #define FPS_THREE_IN(name) \ argument
77 _GLOBAL(fps_ ## name); \
84 name 0,0,1,2; \
154 #define FPD_NONE_IN(name) \ argument
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| /arch/arm/mach-pxa/ |
| D | stargate2.c | 146 .name = "sht15",
187 .name = "vcc_bbio",
194 .name = "vcc_bb",
201 .name = "vcc_pxa_flash",
209 .name = "vcc_cc2420",
216 .name = "vcc_vref",
223 .name = "vcc_sram_ext",
230 .name = "vcc_mica",
237 .name = "vcc_bt",
244 .name = "vcc_lcd",
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