Searched refs:operations (Results 1 – 25 of 34) sorted by relevance
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| /arch/unicore32/mm/ |
| D | Kconfig | 35 Say Y here to disable the data cache line operations.
41 Say Y here to disable the TLB single entry operations.
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| /arch/arm/mach-vexpress/ |
| D | dcscb_setup.S | 33 2: @ Implementation-specific local CPU setup operations should go here,
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| /arch/arm/firmware/ |
| D | Kconfig | 18 active, requiring some core operations to be performed by the secure
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| /arch/arm/include/asm/ |
| D | page.h | 107 #error Unknown user operations model
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| /arch/metag/lib/ |
| D | memcpy.S | 109 ! Calculate the bit offsets required for the shift operations necesssary
137 ! Calculate the bit offsets required for the shift operations necesssary
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| /arch/s390/kernel/ |
| D | head64.S | 67 .quad .Llinkage_stack # cr15: linkage stack operations
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| /arch/arm/mm/ |
| D | Kconfig | 147 instruction sequences for cache and TLB operations. Curiously,
735 trylock() operations with the assumption that the code will not
744 perform SWP operations to uncached memory to deadlock.
804 To support such cache operations, it is efficient to know the size
912 cache maintenance operations and the dma_{map,unmap}_area()
921 processors, if cache maintenance operations are not broadcast
982 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
985 Invalidate maintenance operations: by Physical Address
991 as clean lines are not invalidated as a result of these operations.
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| D | proc-sa1100.S | 45 mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland
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| /arch/arm/common/ |
| D | mcpm_head.S | 130 @ Wait for any previously-pending cluster teardown operations to abort
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| /arch/m68k/ifpsp060/src/ |
| D | pfpsp.S | 1279 # bit five of the fp extension word separates the monadic and dyadic operations
2401 # This exception handles 3 types of operations: #
2407 # For immediate data operations, the data is read in w/ a #
2608 # SNAN : all operations
2609 # OPERR : all reg-reg or mem-reg operations that can normally operr
2614 # INEX1 : all packed immediate operations
3327 # this would be the case for opclass two operations with a source infinity or
3350 # byte, word, long, and packed destination format operations can pass
3351 # through here. since packed format operations already were handled by
3790 # this would be the case for opclass two operations with a source zero
[all …]
|
| /arch/frv/ |
| D | Kconfig | 79 bool "Out-of-line the FRV atomic operations"
82 Setting this option causes the FR-V atomic operations to be mostly
|
| /arch/x86/ |
| D | Kconfig.cpu | 205 operations.
323 memory operations to violate the x86 ordering standard in rare cases.
326 memory barrier operations.
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| /arch/sparc/include/asm/ |
| D | vio.h | 132 u64 operations; member
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| /arch/arm/ |
| D | Kconfig | 980 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
991 erratum. For very specific sequences of memory operations, it is
1019 between two write operations may not ensure the correct visibility
1048 corrects this value, ensuring cache maintenance operations which use
1052 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1057 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1150 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1462 management operations described in ARM document number ARM DEN
1764 such copy operations with large buffers.
2141 Note that gcc does not generate 80-bit operations by default,
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| /arch/ia64/ |
| D | Kconfig | 593 tristate "Memory special operations driver"
598 operations support (formerly known as fetchop), say Y here,
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| /arch/metag/ |
| D | Kconfig | 147 This option selects the mechanism for performing atomic operations.
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| /arch/arm/kernel/ |
| D | head.S | 525 @ Cortex-A9 CPU is present but SMP operations fault.
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| /arch/cris/arch-v32/drivers/ |
| D | Kconfig | 176 for cryptographic operations.
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| /arch/sh/ |
| D | Kconfig | 735 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
739 atomic operations using a software implementation of load-locked/
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| /arch/parisc/kernel/ |
| D | perf_asm.S | 100 ;* for RDR10 which has bits that preclude PDC stack operations
|
| /arch/powerpc/platforms/ |
| D | Kconfig | 327 bool "Use the platform RTC operations from user space"
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| /arch/mn10300/ |
| D | Kconfig | 124 capable of doing LL/SC equivalent operations.
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| /arch/sparc/lib/ |
| D | M7memcpy.S | 450 ! ST_CHUNK batches up initial BIS operations for several cache lines
453 ! BIS operations are executed.
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| /arch/arm64/ |
| D | Kconfig | 884 trylock() operations with the assumption that the code will not
893 perform SWP operations to uncached memory to deadlock.
1029 operations if DC CVAP is not supported (following the behaviour of
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| /arch/m68k/ |
| D | Kconfig.cpu | 380 some operations. Say N if not sure.
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