Home
last modified time | relevance | path

Searched refs:r30 (Results 1 – 25 of 86) sorted by relevance

1234

/arch/score/mm/
Dtlb-miss.S90 mfcr r30, cr6
91 srli r30, r30, 22 /* PGDIR_SHIFT = 22*/
92 slli r30, r30, 2
93 add r31, r31, r30
96 mfcr r30, cr9
97 andi r30, 0xfff /* equivalent to get PET index and right shift 2 bits */
98 add r31, r31, r30
99 lw r30, [r31, 0] /* load pte entry */
100 mtcr r30, cr12
117 mfcr r30, cr6
[all …]
/arch/parisc/include/asm/
Dassembly.h319 fstd,ma %fr12, 8(%r30)
320 fstd,ma %fr13, 8(%r30)
321 fstd,ma %fr14, 8(%r30)
322 fstd,ma %fr15, 8(%r30)
323 fstd,ma %fr16, 8(%r30)
324 fstd,ma %fr17, 8(%r30)
325 fstd,ma %fr18, 8(%r30)
326 fstd,ma %fr19, 8(%r30)
327 fstd,ma %fr20, 8(%r30)
328 fstd,ma %fr21, 8(%r30)
[all …]
/arch/score/kernel/
Dhead.S36 la r30, __bss_start /* initialize BSS segment. */
40 1: cmp.c r31, r30
43 sw r8, [r30] /* clean memory. */
44 addi r30, 4
50 la r30, kernelsp
51 sw r0, [r30]
53 xor r30, r30, r30
54 ori r30, 0x02 /* enable MMU. */
55 mtcr r30, cr4
69 la r30, start_kernel /* jump to init_arch */
[all …]
/arch/powerpc/kernel/
Dkvm_emul.S44 PPC_STL r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH2)(0); \
51 lwz r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH3)(0); \
52 mtcr r30; \
53 PPC_LL r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH2)(0); \
69 lis r30, (~(MSR_EE | MSR_RI))@h
70 ori r30, r30, (~(MSR_EE | MSR_RI))@l
71 and r31, r31, r30
75 ori r30, r0, 0
76 andi. r30, r30, (MSR_EE|MSR_RI)
77 or r31, r31, r30
[all …]
/arch/score/include/asm/
Dasmmacro.h10 mfcr r30, cr0
14 slli.c r30, r30, 28
19 mv r30, r0
22 sw r30, [r0, PT_R0]
63 mfcehl r30, r31
64 sw r30, [r0, PT_CEH]
83 mfcr r30, cr0
84 srli r30, r30, 1
85 slli r30, r30, 1
86 mtcr r30, cr0
[all …]
/arch/microblaze/lib/
Dmodsi3.S22 swi r30, r1, 8
36 addik r30, r0, 0 /* clear div */
51 addik r30, r30, 1
55 add r30, r30, r30 /* shift in the '1' into div */
68 lwi r30, r1, 8
Ddivsi3.S20 swi r30, r1, 8
32 addik r30, r0, 0 /* clear mod */
46 addc r30, r30, r30 /* move that bit into the mod register */
47 rsub r31, r6, r30 /* try to subtract (r30 a r6) */
50 or r30, r0, r31
68 lwi r30, r1, 8
Dudivsi3.S22 swi r30, r1, 4
27 addik r30, r0, 0 /* clear mod */
60 addc r30, r30, r30 /* move that bit into the mod register */
61 rsub r31, r6, r30 /* try to subtract (r30 a r6) */
64 or r30, r0, r31
79 lwi r30, r1, 4
Dumodsi3.S21 swi r30, r1, 4
27 addik r30, r0, 0 /* clear mod */
67 addik r30, r30, 1
71 add r30, r30, r30 /* shift in the '1' into div */
81 lwi r30, r1, 4
/arch/microblaze/kernel/
Dhead.S246 ori r30, r0, 0x200
249 addik r30, r30, 0x80
252 addik r30, r30, 0x80
255 addik r30, r30, 0x80
259 or r3, r3, r30
276 ori r30, r0, 0x200
279 addik r30, r30, 0x80
282 addik r30, r30, 0x80
285 addik r30, r30, 0x80
292 or r3, r3, r30
/arch/ia64/lib/
Dxor.S24 .save ar.lc, r30
25 mov r30 = ar.lc
51 mov ar.lc = r30
62 .save ar.lc, r30
63 mov r30 = ar.lc
92 mov ar.lc = r30
103 .save ar.lc, r30
104 mov r30 = ar.lc
136 mov ar.lc = r30
147 .save ar.lc, r30
[all …]
Dmemcpy_mck.S60 #define tmp r30
99 sub r30=8,r28 // for .align_dest
104 cmp.le p6,p0 = 1,r30 // for .align_dest
300 and r30=7,src0 // source alignment
341 shl r28=r30, LOOP_SIZE // jmp_table thread
357 (p6) shl r25=r30,3
403 add src0=src1,r30 // forward by src alignment
470 cmp.le p7,p0 = 2,r30 // for .align_dest
471 cmp.le p8,p0 = 3,r30 // for .align_dest
473 cmp.le p9,p0 = 4,r30 // for .align_dest
[all …]
/arch/parisc/kernel/
Dsyscall.S121 or,ev %r1,%r30,%r30
143 xor %r1,%r30,%r30 /* ye olde xor trick */
144 xor %r1,%r30,%r1
145 xor %r1,%r30,%r30
147 ldo THREAD_SZ_ALGN+FRAME_SIZE(%r30),%r30 /* set up kernel stack */
157 STREGM %r1,FRAME_SIZE(%r30) /* save r1 (usp) here for now */
170 LDREGM -FRAME_SIZE(%r30), %r2 /* get users sp back */
203 ldo -16(%r30),%r29 /* Reference param save area */
208 stw %r22, -52(%r30) /* 5th argument */
209 stw %r21, -56(%r30) /* 6th argument */
[all …]
Dentry.S127 copy %r30, %r17
129 ldo THREAD_SZ_ALGN(%r1), %r30
147 tophys %r30,%r9
148 copy %r30,%r1
149 ldo PT_SZ_ALGN(%r30),%r30
159 LDREG PT_GR30(%r29),%r30
786 LDREG TI_TASK-THREAD_SZ_ALGN-FRAME_SIZE(%r30), %r1
805 STREG %r2, -RP_OFFSET(%r30)
815 STREG %r30, TASK_PT_KSP(%r26)
816 LDREG TASK_PT_KSP(%r25), %r30
[all …]
/arch/tile/kernel/
Drelocate_kernel_64.S27 move r30, r0 /* page list */
77 st sp, r30
78 move r30, sp
123 .Lloop: ld r10, r30
138 addi r30, r30, 8
145 move r30, r10
236 addi r30, r30, 8
Drelocate_kernel_32.S27 move r30, r0 /* page list */
76 sw sp, r30
77 move r30, sp
120 .Lloop: lw r10, r30
135 addi r30, r30, 4
142 move r30, r10
246 addi r30, r30, 4
Dintvec_64.S614 push_reg r30, r52, PTREGS_OFFSET_SYSCALL - PTREGS_OFFSET_REG(30)
619 push_reg r30, r52, PTREGS_OFFSET_REG(29) - PTREGS_OFFSET_REG(30)
768 { move r30, r0; move r31, r1 }
776 { move r0, r30; move r1, r31 }
810 movei r30, 0 /* not an NMI */
827 bnez r30, .Lrestore_all /* NMIs don't special-case user-space */
952 beqzt r30, .Lrestore_regs
959 beqzt r30, .Lrestore_regs
1008 pop_reg r30, sp, PTREGS_OFFSET_REG(52) - PTREGS_OFFSET_REG(30)
1186 movei r30, 1
[all …]
Dintvec_32.S415 push_reg r30, r52, PTREGS_OFFSET_SYSCALL - PTREGS_OFFSET_REG(30)
420 push_reg r30, r52, PTREGS_OFFSET_REG(29) - PTREGS_OFFSET_REG(30)
587 { move r30, r0; move r31, r1 }
595 { move r0, r30; move r1, r31 }
783 movei r30, 0 /* not an NMI */
800 bnz r30, .Lrestore_all /* NMIs don't special-case user-space */
925 bzt r30, .Lrestore_regs
931 bzt r30, .Lrestore_regs
979 pop_reg_zero r30, r2, sp, PTREGS_OFFSET_PC - PTREGS_OFFSET_REG(30)
1143 movei r30, 0 /* not an NMI */
[all …]
/arch/openrisc/kernel/
Dhead.S100 #define EXCEPTION_T_STORE_GPR30 l.sw 0x78(r0),r30
158 l.mfspr r30,r0,SPR_ESR_BASE ;\
159 l.andi r30,r30,SPR_SR_SM ;\
160 l.sfeqi r30,0 ;\
166 tophys (r30,r1) ;\
168 l.lwz r10,0(r30) ;\
169 tophys (r30,r10) ;\
170 l.lwz r1,(TI_KSP)(r30) ;\
178 tophys (r30,r1) ;\
179 l.sw PT_GPR12(r30),r12 ;\
[all …]
Dentry.S86 l.lwz r30,PT_GPR30(r1) ;\
128 l.addi r30,r0,-1 ;\
129 l.sw PT_ORIG_GPR11(r1),r30
163 l.sw PT_GPR30(r1),r30 ;\
166 l.addi r30,r0,-1 ;\
167 l.sw PT_ORIG_GPR11(r1),r30 ;\
595 l.lwz r30,TI_FLAGS(r10)
596 l.andi r30,r30,_TIF_SYSCALL_TRACE
597 l.sfne r30,r0
643 l.sfne r30,r0
[all …]
/arch/ia64/kernel/
Drelocate_kernel.S132 mov r30=in0 // in0 is page_list
136 ld8 r30=[in0], 8;;
138 tbit.z p0, p6=r30, 0;; // 0x1 dest page
139 (p6) and r17=r30, r16
142 tbit.z p0, p6=r30, 1;; // 0x2 indirect page
143 (p6) and in0=r30, r16
146 tbit.z p0, p6=r30, 2;; // 0x4 end flag
149 tbit.z p6, p0=r30, 3;; // 0x8 source page
152 and r18=r30, r16
317 st8 [in0]=r30, 8 // r30
Dfsys.S148 mov r30 = CLOCK_DIVIDE_BY_1000
203 mov pr = r30,0xc000 // Set predicates according to function
219 ld8 r30 = [r21] // clocksource->mmio_ptr
227 cmp.eq p8,p9 = 0,r30 // use cpu timer if no mmio_ptr
233 (p9) cmp.eq p13,p0 = 0,r30 // if mmio_ptr, clear p13 jitter control
237 (p9) ld8 r2 = [r30] // MMIO_TIMER. Could also have latency issues..
324 shl r30 = r32,15
487 MOV_FROM_ITC(p0, p6, r30, r23) // M get cycle for accounting
524 st8 [r16]=r30,TI_AC_STIME-TI_AC_STAMP // update stamp
525 sub r18=r30,r19 // elapsed time in user mode
/arch/tile/mm/
Dmigrate_64.S62 #define r_context r30
87 st r_tmp, r30
155 ld r30, r_tmp
Dmigrate_32.S68 #define r_context_lo r30
90 sw r_tmp, r30
172 lw r30, r_tmp
/arch/powerpc/lib/
Dmemcmp_64.S23 #define rG r30
91 std r30,-16(r1)
184 ld r30,-16(r1)
230 ld r30,-16(r1)

1234