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Searched refs:rs (Results 1 – 25 of 66) sorted by relevance

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/arch/mips/include/asm/
Duasm.h191 void UASM_i_LA_mostly(u32 **buf, unsigned int rs, long addr);
192 void UASM_i_LA(u32 **buf, unsigned int rs, long addr);
202 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val) argument
203 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd) argument
204 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off) argument
205 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off) argument
206 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd) argument
209 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) argument
210 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off) argument
211 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) argument
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Dasm.h183 #define MOVN(rd, rs, rt) \ argument
187 move rd, rs; \
190 #define MOVZ(rd, rs, rt) \ argument
194 move rd, rs; \
199 #define MOVN(rd, rs, rt) \ argument
203 move rd, rs; \
206 #define MOVZ(rd, rs, rt) \ argument
210 move rd, rs; \
216 #define MOVN(rd, rs, rt) \ argument
217 movn rd, rs, rt
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/arch/arm/mach-omap1/
Dreset.c50 u16 rs; in omap1_get_reset_sources() local
52 rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST)); in omap1_get_reset_sources()
54 if (rs & (1 << ARM_SYSST_POR_SHIFT)) in omap1_get_reset_sources()
56 if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT)) in omap1_get_reset_sources()
58 if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT)) in omap1_get_reset_sources()
60 if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT)) in omap1_get_reset_sources()
/arch/mips/kernel/
Dmips-r2-to-r6-emul.c405 s32 rt, rs; in mult_func() local
408 rs = regs->regs[MIPSInst_RS(ir)]; in mult_func()
409 res = (s64)rt * (s64)rs; in mult_func()
411 rs = res; in mult_func()
412 regs->lo = (s64)rs; in mult_func()
432 u32 rt, rs; in multu_func() local
435 rs = regs->regs[MIPSInst_RS(ir)]; in multu_func()
436 res = (u64)rt * (u64)rs; in multu_func()
455 s32 rt, rs; in div_func() local
458 rs = regs->regs[MIPSInst_RS(ir)]; in div_func()
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Dbranch.c83 *contpc = regs->regs[insn.mm_i_format.rs]; in __mm_isBranchInstr()
97 if ((long)regs->regs[insn.mm_i_format.rs] < 0) in __mm_isBranchInstr()
113 if ((long)regs->regs[insn.mm_i_format.rs] >= 0) in __mm_isBranchInstr()
123 if ((long)regs->regs[insn.mm_i_format.rs] <= 0) in __mm_isBranchInstr()
133 if ((long)regs->regs[insn.mm_i_format.rs] <= 0) in __mm_isBranchInstr()
158 bit = (insn.mm_i_format.rs >> 2); in __mm_isBranchInstr()
179 *contpc = regs->regs[insn.mm_i_format.rs]; in __mm_isBranchInstr()
184 if ((long)regs->regs[reg16to32map[insn.mm_b1_format.rs]] == 0) in __mm_isBranchInstr()
193 if ((long)regs->regs[reg16to32map[insn.mm_b1_format.rs]] != 0) in __mm_isBranchInstr()
206 if (regs->regs[insn.mm_i_format.rs] == in __mm_isBranchInstr()
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/arch/mips/math-emu/
Dieee754sp.h49 #define XSPSRS64(v, rs) \ argument
50 (((rs) >= 64) ? ((v) != 0) : ((v) >> (rs)) | ((v) << (64-(rs)) != 0))
53 #define XSPSRS(v, rs) \ argument
54 ((rs > (SP_FBITS+3))?1:((v) >> (rs)) | ((v) << (32-(rs)) != 0))
Dieee754dp.h49 #define XDPSRS(v,rs) \ argument
50 ((rs > (DP_FBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
Dsp_maddf.c22 int rs; in _sp_maddf() local
163 rs = xs ^ ys; in _sp_maddf()
165 rs ^= 1; in _sp_maddf()
188 return ieee754sp_format(rs, re, rm); in _sp_maddf()
215 if (zs == rs) { in _sp_maddf()
230 zs = rs; in _sp_maddf()
Ddp_maddf.c47 int rs; in _dp_maddf() local
192 rs = xs ^ ys; in _dp_maddf()
194 rs ^= 1; in _dp_maddf()
247 return ieee754dp_format(rs, re, lrm); in _dp_maddf()
275 if (zs == rs) { in _dp_maddf()
293 zs = rs; in _dp_maddf()
Ddsemul.c235 unsigned int rs; in mips_dsemul() local
238 rs = (((insn.mm_a_format.rs + 0xe) & 0xf) + 2); in mips_dsemul()
241 regs->regs[rs] = (long)v; in mips_dsemul()
Dsp_mul.c27 int rs; in ieee754sp_mul() local
121 rs = xs ^ ys; in ieee754sp_mul()
165 return ieee754sp_format(rs, re, rm); in ieee754sp_mul()
/arch/powerpc/kvm/
Demulate_loadstore.c74 int ra, rs, rt; in kvmppc_emulate_loadstore() local
86 rs = get_rs(inst); in kvmppc_emulate_loadstore()
125 kvmppc_get_gpr(vcpu, rs), 8, 1); in kvmppc_emulate_loadstore()
130 kvmppc_get_gpr(vcpu, rs), 8, 1); in kvmppc_emulate_loadstore()
136 kvmppc_get_gpr(vcpu, rs), 4, 1); in kvmppc_emulate_loadstore()
141 kvmppc_get_gpr(vcpu, rs), 4, 1); in kvmppc_emulate_loadstore()
147 kvmppc_get_gpr(vcpu, rs), 1, 1); in kvmppc_emulate_loadstore()
152 kvmppc_get_gpr(vcpu, rs), 1, 1); in kvmppc_emulate_loadstore()
176 kvmppc_get_gpr(vcpu, rs), 2, 1); in kvmppc_emulate_loadstore()
181 kvmppc_get_gpr(vcpu, rs), 2, 1); in kvmppc_emulate_loadstore()
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Dbook3s_64_mmu.c381 static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb) in kvmppc_mmu_book3s_64_slbmte() argument
387 dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb); in kvmppc_mmu_book3s_64_slbmte()
398 slbe->large = (rs & SLB_VSID_L) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
399 slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
401 slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16); in kvmppc_mmu_book3s_64_slbmte()
403 slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
404 slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
405 slbe->nx = (rs & SLB_VSID_N) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
406 slbe->class = (rs & SLB_VSID_C) ? 1 : 0; in kvmppc_mmu_book3s_64_slbmte()
411 switch (rs & SLB_VSID_LP) { in kvmppc_mmu_book3s_64_slbmte()
[all …]
Demulate.c93 static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) in kvmppc_emulate_mtspr() argument
96 ulong spr_val = kvmppc_get_gpr(vcpu, rs); in kvmppc_emulate_mtspr()
215 int rs, rt, sprn; in kvmppc_emulate_instruction() local
228 rs = get_rs(inst); in kvmppc_emulate_instruction()
269 emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs); in kvmppc_emulate_instruction()
Dbook3s_paired_singles.c184 int rs, ulong addr, int ls_type) in kvmppc_emulate_fpr_load() argument
202 emulated = kvmppc_handle_load(run, vcpu, KVM_MMIO_REG_FPR | rs, in kvmppc_emulate_fpr_load()
212 kvm_cvt_fd((u32*)tmp, &VCPU_FPR(vcpu, rs)); in kvmppc_emulate_fpr_load()
213 vcpu->arch.qpr[rs] = *((u32*)tmp); in kvmppc_emulate_fpr_load()
216 VCPU_FPR(vcpu, rs) = *((u64*)tmp); in kvmppc_emulate_fpr_load()
228 int rs, ulong addr, int ls_type) in kvmppc_emulate_fpr_store() argument
238 kvm_cvt_df(&VCPU_FPR(vcpu, rs), (u32*)tmp); in kvmppc_emulate_fpr_store()
243 *((u32*)tmp) = VCPU_FPR(vcpu, rs); in kvmppc_emulate_fpr_store()
244 val = VCPU_FPR(vcpu, rs) & 0xffffffff; in kvmppc_emulate_fpr_store()
248 *((u64*)tmp) = VCPU_FPR(vcpu, rs); in kvmppc_emulate_fpr_store()
[all …]
/arch/powerpc/mm/
Dtlb-radix.c29 unsigned long rb,rs,prs,r; in __tlbie_va() local
33 rs = pid << PPC_BITLSHIFT(31); in __tlbie_va()
38 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); in __tlbie_va()
39 trace_tlbie(0, 0, rb, rs, ric, prs, r); in __tlbie_va()
60 unsigned long rb,rs,prs,r; in __tlbiel_pid() local
64 rs = ((unsigned long)pid) << PPC_BITLSHIFT(31); in __tlbiel_pid()
69 : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory"); in __tlbiel_pid()
70 trace_tlbie(0, 1, rb, rs, ric, prs, r); in __tlbiel_pid()
104 unsigned long rb,rs,prs,r; in __tlbie_pid() local
107 rs = pid << PPC_BITLSHIFT(31); in __tlbie_pid()
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/arch/microblaze/include/asm/
Dpage.h186 #define tophys(rd, rs) addik rd, rs, 0 argument
187 #define tovirt(rd, rs) addik rd, rs, 0 argument
193 #define tophys(rd, rs) \ argument
194 addik rd, rs, (CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START)
195 #define tovirt(rd, rs) \ argument
196 addik rd, rs, (CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR)
/arch/mips/txx9/generic/
Dmem_tx4927.c44 unsigned int rs = 0; in tx4927_process_sdccr() local
59 rs = 2048 << sdccr_rs; in tx4927_process_sdccr()
64 return rs * cs * mw * bs; in tx4927_process_sdccr()
/arch/powerpc/include/asm/
Dtrace.h176 unsigned long rs, unsigned long ric, unsigned long prs,
178 TP_ARGS(lpid, local, rb, rs, ric, prs, r),
183 __field(unsigned long, rs)
193 __entry->rs = rs;
201 __entry->rb, __entry->rs, __entry->ric, __entry->prs,
/arch/tile/kernel/
Dhead_64.S30 #define GET_FIRST_INT(rd, rs) shrsi rd, rs, 32 argument
31 #define GET_SECOND_INT(rd, rs) addxi rd, rs, 0 argument
33 #define GET_FIRST_INT(rd, rs) addxi rd, rs, 0 argument
34 #define GET_SECOND_INT(rd, rs) shrsi rd, rs, 32 argument
/arch/mips/mm/
Duasm.c447 void UASM_i_LA_mostly(u32 **buf, unsigned int rs, long addr) in UASM_i_LA_mostly() argument
450 uasm_i_lui(buf, rs, uasm_rel_highest(addr)); in UASM_i_LA_mostly()
452 uasm_i_daddiu(buf, rs, rs, uasm_rel_higher(addr)); in UASM_i_LA_mostly()
454 uasm_i_dsll(buf, rs, rs, 16); in UASM_i_LA_mostly()
455 uasm_i_daddiu(buf, rs, rs, in UASM_i_LA_mostly()
457 uasm_i_dsll(buf, rs, rs, 16); in UASM_i_LA_mostly()
459 uasm_i_dsll32(buf, rs, rs, 0); in UASM_i_LA_mostly()
461 uasm_i_lui(buf, rs, uasm_rel_hi(addr)); in UASM_i_LA_mostly()
465 void UASM_i_LA(u32 **buf, unsigned int rs, long addr) in UASM_i_LA() argument
467 UASM_i_LA_mostly(buf, rs, addr); in UASM_i_LA()
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/arch/mips/lasat/
Dpicvue.c66 data &= ~picvue->rs; in pvc_read_data()
70 data |= picvue->rs; in pvc_read_data()
96 data |= picvue->rs; in pvc_write()
98 data &= ~picvue->rs; in pvc_write()
103 data &= ~picvue->rs; in pvc_write()
105 data |= picvue->rs; in pvc_write()
/arch/powerpc/kernel/
Disa-bridge.c179 int rlen, i, rs; in isa_bridge_init_non_pci() local
201 rs = na + ns + pna; in isa_bridge_init_non_pci()
205 if (ranges == NULL || rlen < rs) { in isa_bridge_init_non_pci()
212 for (i = 0; (i + rs - 1) < rlen; i += rs) { in isa_bridge_init_non_pci()
/arch/mips/include/uapi/asm/
Dinst.h633 __BITFIELD_FIELD(unsigned int rs : 5,
641 __BITFIELD_FIELD(unsigned int rs : 5,
649 __BITFIELD_FIELD(unsigned int rs : 5,
658 __BITFIELD_FIELD(unsigned int rs : 5,
668 __BITFIELD_FIELD(unsigned int rs : 5,
678 __BITFIELD_FIELD(unsigned int rs : 5,
698 __BITFIELD_FIELD(unsigned int rs : 5,
737 __BITFIELD_FIELD(unsigned int rs : 5,
759 __BITFIELD_FIELD(unsigned int rs : 5,
778 __BITFIELD_FIELD(unsigned int rs:5,
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/arch/mips/include/asm/octeon/
Dcvmx-asm.h130 asm ("pop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input))
132 asm ("dpop %[rd],%[rs]" : [rd] "=d" (result) : [rs] "d" (input))

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