| /arch/mips/txx9/generic/ |
| D | setup_tx4939.c | 519 __u64 pcfg, rst = 0, ckd = 0; in tx4939_stop_unused_modules() local
527 rst |= TX4939_CLKCTR_ACLRST; in tx4939_stop_unused_modules()
535 rst |= TX4939_CLKCTR_I2SRST; in tx4939_stop_unused_modules()
540 rst |= TX4939_CLKCTR_ATA0RST; in tx4939_stop_unused_modules()
545 rst |= TX4939_CLKCTR_ATA1RST; in tx4939_stop_unused_modules()
550 rst |= TX4939_CLKCTR_SPIRST; in tx4939_stop_unused_modules()
555 rst |= TX4939_CLKCTR_VPCRST; in tx4939_stop_unused_modules()
560 rst |= TX4939_CLKCTR_SIO2RST; in tx4939_stop_unused_modules()
565 rst |= TX4939_CLKCTR_SIO3RST; in tx4939_stop_unused_modules()
569 if (rst | ckd) { in tx4939_stop_unused_modules()
[all …]
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| D | setup_tx4938.c | 433 __u64 pcfg, rst = 0, ckd = 0; in tx4938_stop_unused_modules() local
442 rst |= TX4938_CLKCTR_ACLRST; in tx4938_stop_unused_modules()
450 rst |= TX4938_CLKCTR_ACLRST; in tx4938_stop_unused_modules()
458 rst |= TX4938_CLKCTR_NDFRST; in tx4938_stop_unused_modules()
463 rst |= TX4938_CLKCTR_SPIRST; in tx4938_stop_unused_modules()
469 if (rst | ckd) { in tx4938_stop_unused_modules()
470 txx9_set64(&tx4938_ccfgptr->clkctr, rst); in tx4938_stop_unused_modules()
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| D | setup_tx4927.c | 310 __u64 pcfg, rst = 0, ckd = 0; in tx4927_stop_unused_modules() local
317 rst |= TX4927_CLKCTR_ACLRST; in tx4927_stop_unused_modules()
321 if (rst | ckd) { in tx4927_stop_unused_modules()
322 txx9_set64(&tx4927_ccfgptr->clkctr, rst); in tx4927_stop_unused_modules()
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| /arch/arm/mach-omap2/ |
| D | prm2xxx_3xxx.c | 88 u32 rst, st; in omap2_prm_deassert_hardreset() local
91 rst = 1 << rst_shift; in omap2_prm_deassert_hardreset()
95 if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0) in omap2_prm_deassert_hardreset()
101 omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL); in omap2_prm_deassert_hardreset()
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| /arch/mips/boot/dts/qca/ |
| D | ar9331.dtsi | 111 rst: reset-controller@1806001c { label
124 resets = <&rst 5>;
150 resets = <&rst 4>, <&rst 3>;
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| D | ar9132.dtsi | 123 rst: reset-controller@1806001c { label
137 resets = <&rst 5>;
165 resets = <&rst 4>, <&rst 3>;
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| /arch/mips/lasat/ |
| D | ds1603.c | 44 rtc_reg_write(rtc_reg_read() | ds1603->rst); in rtc_nrst_high()
49 rtc_reg_write(rtc_reg_read() & ~ds1603->rst); in rtc_nrst_low()
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| D | ds1603.h | 14 u32 rst; member
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-ciu-defs.h | 2389 uint64_t rst:1; member
2469 uint64_t rst:1;
2551 uint64_t rst:1; member
2617 uint64_t rst:1;
2622 uint64_t rst:1; member
2688 uint64_t rst:1;
2694 uint64_t rst:1; member
2768 uint64_t rst:1;
2773 uint64_t rst:1; member
2833 uint64_t rst:1;
[all …]
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| D | cvmx-ciu2-defs.h | 511 uint64_t rst:1; member
553 uint64_t rst:1;
564 uint64_t rst:1; member
606 uint64_t rst:1;
617 uint64_t rst:1; member
659 uint64_t rst:1;
1498 uint64_t rst:1; member
1540 uint64_t rst:1;
1551 uint64_t rst:1; member
1593 uint64_t rst:1;
[all …]
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| D | cvmx-ipd.h | 332 pip_sft_rst.s.rst = 1; in cvmx_ipd_free_ptr()
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| /arch/arm/boot/dts/ |
| D | socfpga.dtsi | 18 #include <dt-bindings/reset/altr,rst-mgr.h>
535 resets = <&rst LWHPS2FPGA_RESET>;
542 resets = <&rst HPS2FPGA_RESET>;
562 resets = <&rst EMAC0_RESET>;
580 resets = <&rst EMAC1_RESET>;
776 rst: rstmgr@ffd05000 { label
778 compatible = "altr,rst-mgr";
902 resets = <&rst USB0_RESET>;
915 resets = <&rst USB1_RESET>;
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| D | socfpga_arria10.dtsi | 18 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
430 resets = <&rst EMAC0_RESET>;
450 resets = <&rst EMAC1_RESET>;
536 resets = <&rst FPGAMGR_RESET>;
729 rst: rstmgr@ffd05000 { label
731 compatible = "altr,rst-mgr";
819 resets = <&rst USB0_RESET>;
832 resets = <&rst USB1_RESET>;
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| D | stih407-family.dtsi | 410 reset-names = "miphy-sw-rst";
426 reset-names = "miphy-sw-rst";
440 reset-names = "miphy-sw-rst";
621 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
645 "sw-rst",
646 "pwr-rst";
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| D | sun7i-a20-olinuxino-lime2-emmc.dts | 59 mmc2_pins_nrst: mmc2-rst-pin {
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| D | rk3066a-rayeager.dts | 368 rmii_rst: rmii-rst {
402 hub_rst: hub-rst {
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| /arch/arm64/boot/dts/renesas/ |
| D | r8a77995.dtsi | 120 rst: reset-controller@e6160000 { label
121 compatible = "renesas,r8a77995-rst";
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| /arch/arm64/boot/dts/hisilicon/ |
| D | hip06.dtsi | 485 port-rst-offset = <0>;
493 port-rst-offset = <1>;
502 port-rst-offset = <4>;
511 port-rst-offset = <5>;
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| /arch/cris/arch-v32/mach-a3/ |
| D | dram_init.S | 45 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \
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| /arch/cris/include/arch-v32/arch/hwregs/ |
| D | ata_defs.h | 95 unsigned int rst : 1; member
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| /arch/cris/include/arch-v32/arch/hwregs/iop/ |
| D | iop_timer_grp_defs.h | 144 unsigned int rst : 4; member
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| /arch/arm64/boot/dts/altera/ |
| D | socfpga_stratix10.dtsi | 222 rst: rstmgr@ffd11000 { label
224 compatible = "altr,rst-mgr";
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| /arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| D | ddr2_defs.h | 137 unsigned int rst : 1; member
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| /arch/mips/boot/dts/img/ |
| D | pistachio.dtsi | 151 reset-names = "rst";
168 reset-names = "rst";
187 reset-names = "rst";
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| /arch/powerpc/platforms/powermac/ |
| D | feature.c | 1067 const u32 *rst = of_get_property(np, "soft-reset", NULL); in core99_reset_cpu() local
1068 if (num == NULL || rst == NULL) in core99_reset_cpu()
1071 reset_io = *rst; in core99_reset_cpu()
1518 const u32 *rst = of_get_property(np, "soft-reset", NULL); in g5_reset_cpu() local
1519 if (num == NULL || rst == NULL) in g5_reset_cpu()
1522 reset_io = *rst; in g5_reset_cpu()
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