| /arch/arm/crypto/ |
| D | sha2-ce-core.S | 34 .macro add_only, ev, s0 argument
36 .ifnb \s0
41 .ifnb \s0
42 vadd.u32 ta\ev, q\s0, k\ev
46 .macro add_update, ev, s0, s1, s2, s3
47 sha256su0.32 q\s0, q\s1
49 sha256su1.32 q\s0, q\s2, q\s3
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| D | sha1-ce-core.S | 38 .macro add_only, op, ev, rc, s0, dg1
39 .ifnb \s0
40 vadd.u32 tb\ev, q\s0, \rc
50 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
51 sha1su0.32 q\s0, q\s1, q\s2
53 sha1su1.32 q\s0, q\s3
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| D | sha512-armv4.pl | 553 my ($t0,$t1,$s0,$s1) = map("q$_",(12..15)); # temps
563 vext.8 $s0,@X[$i%8],@X[($i+1)%8],#8 @ X[i+1]
566 vshr.u64 $t0,$s0,#@sigma0[0]
568 vshr.u64 $t1,$s0,#@sigma0[1]
570 vshr.u64 $s1,$s0,#@sigma0[2]
571 vsli.64 $t0,$s0,#`64-@sigma0[0]`
572 vsli.64 $t1,$s0,#`64-@sigma0[1]`
573 vext.8 $s0,@X[($i+4)%8],@X[($i+5)%8],#8 @ X[i+9]
576 vadd.i64 @X[$i%8],$s0
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| D | aes-neonbs-core.S | 201 t0, t1, t2, t3, s0, s1, s2, s3
206 veor \s0, \x0, \x2
209 vand \s2, \t3, \s0
210 vorr \t3, \t3, \s0
211 veor \s0, \s0, \t1
214 vand \s3, \s3, \s0
217 veor \s0, \x1, \x0
220 vand \s1, \t1, \s0
221 vorr \t1, \t1, \s0
227 vand \s0, \x7, \x3
[all …]
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| /arch/mips/kernel/ |
| D | relocate_kernel.S | 22 PTR_L s0, kexec_indirection_page
26 PTR_L s2, (s0)
27 PTR_ADDIU s0, s0, SZREG
45 and s0, s2, ~0x2
127 1: LONG_L s0, (t0)
128 bne s0, zero,1b
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| D | cps-vec-ns16550.S | 163 move s0, ra
196 jr s0
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| D | entry.S | 36 LONG_S s0, TI_REGS($28)
75 jal s0
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| D | genex.S | 189 LONG_L s0, TI_REGS($28)
296 move s0, v0
298 move v0, s0
301 LONG_L s0, TI_REGS($28)
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| /arch/arm64/crypto/ |
| D | sha2-ce-core.S | 32 .macro add_only, ev, rc, s0 argument
35 add t1.4s, v\s0\().4s, \rc\().4s
39 .ifnb \s0
40 add t0.4s, v\s0\().4s, \rc\().4s
47 .macro add_update, ev, rc, s0, s1, s2, s3
48 sha256su0 v\s0\().4s, v\s1\().4s
50 sha256su1 v\s0\().4s, v\s2\().4s, v\s3\().4s
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| D | sha1-ce-core.S | 37 .macro add_only, op, ev, rc, s0, dg1
39 add t1.4s, v\s0\().4s, \rc\().4s
47 .ifnb \s0
48 add t0.4s, v\s0\().4s, \rc\().4s
55 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
56 sha1su0 v\s0\().4s, v\s1\().4s, v\s2\().4s
58 sha1su1 v\s0\().4s, v\s3\().4s
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| D | aes-neonbs-core.S | 141 t0, t1, t2, t3, s0, s1, s2, s3
146 eor \s0, \x0, \x2
149 and \s2, \t3, \s0
150 orr \t3, \t3, \s0
151 eor \s0, \s0, \t1
154 and \s3, \s3, \s0
157 eor \s0, \x1, \x0
160 and \s1, \t1, \s0
161 orr \t1, \t1, \s0
167 and \s0, \x7, \x3
[all …]
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| /arch/mips/boot/compressed/ |
| D | head.S | 23 move s0, a0
43 move a0, s0
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| /arch/mips/include/asm/ |
| D | regdef.h | 42 #define s0 $16 /* callee saved */ macro
85 #define s0 $16 /* callee saved */ macro
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| D | asmmacro-64.h | 18 LONG_S s0, THREAD_REG16(\thread)
31 LONG_L s0, THREAD_REG16(\thread)
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| D | asmmacro-32.h | 65 LONG_S s0, THREAD_REG16(\thread)
78 LONG_L s0, THREAD_REG16(\thread)
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| /arch/mips/alchemy/devboards/ |
| D | db1000.c | 499 int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1; in db1000_dev_setup() local
508 s0 = AU1500_GPIO1_INT; in db1000_dev_setup()
515 s0 = AU1100_GPIO1_INT; in db1000_dev_setup()
550 s0 = AU1000_GPIO1_INT; in db1000_dev_setup()
557 s0 = AU1500_GPIO202_INT; in db1000_dev_setup()
570 s0 = AU1100_GPIO10_INT; in db1000_dev_setup()
587 irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW); in db1000_dev_setup()
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| /arch/mips/power/ |
| D | hibernate_asm.S | 21 PTR_S s0, PT_R16(t0)
51 PTR_L s0, PT_R16(t0)
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| /arch/alpha/include/uapi/asm/ |
| D | regdef.h | 16 #define s0 $9 /* saved-registers (callee-saved registers) */ macro
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| /arch/x86/crypto/ |
| D | twofish-x86_64-asm_64-3way.S | 29 #define s0 0 macro
159 g1g2_3(ab, cd, s0, s1, s2, s3, s0, s1, s2, s3, RX, RY); \
166 g1g2_3(ba, dc, s1, s2, s3, s0, s3, s0, s1, s2, RY, RX); \
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| D | blowfish-x86_64-asm_64.S | 30 #define s0 ((16 + 2) * 4) macro
79 movl s0(CTX,RT0,4), RT0d; \
205 movl s0(CTX,RT0,4), RT0d; \
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| D | twofish-avx-x86_64-asm_64.S | 45 #define s0 0 macro
139 G(RGI1, RGI2, x1, s0, s1, s2, s3); \
145 G(RGI3, RGI4, y1, s1, s2, s3, s0); \
151 G(RGI1, RGI2, x2, s0, s1, s2, s3); \
155 G(RGI3, RGI4, y2, s1, s2, s3, s0); \
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| D | chacha20-ssse3-x86_64.S | 38 # x0..3 = s0..3
124 # o0 = i0 ^ (x0 + s0)
167 # x0..15[0-3] = s0..3[0..3]
427 # x0[0-3] += s0[0]
428 # x1[0-3] += s0[1]
436 # x2[0-3] += s0[2]
437 # x3[0-3] += s0[3]
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| /arch/mips/fw/lib/ |
| D | call_o32.S | 60 REG_S s0,O32_FRAMESZ-11*SZREG(sp)
94 REG_L s0,O32_FRAMESZ-11*SZREG(sp)
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| /arch/cris/arch-v32/kernel/ |
| D | kgdb_asm.S | 328 move $r0, $s0
379 move $r0, $s0
421 move $r0, $s0
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| D | head.S | 143 move $r2, $s0 ; mm_cfg, virtual memory configuration.
152 move $r2, $s0 ; mm_cfg, virtual memory configuration.
160 move $r0, $s0
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