| /arch/m68k/include/asm/ |
| D | uaccess_mm.h | 188 #define ____constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)\ argument
195 " .ifnc \""#s3"\",\"\"\n" \
196 "3: "MOVES"."#s3" (%2)+,%3\n" \
197 " move."#s3" %3,(%1)+\n" \
206 " .ifnc \""#s3"\",\"\"\n" \
217 " .ifnc \""#s3"\",\"\"\n" \
226 #define ___constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)\ argument
227 ____constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)
279 #define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \ argument
286 " .ifnc \""#s3"\",\"\"\n" \
[all …]
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| /arch/mips/kernel/ |
| D | relocate_kernel.S | 36 and s3, s2, 0x1
37 beq s3, zero, 1f
43 and s3, s2, 0x2
44 beq s3, zero, 1f
50 and s3, s2, 0x4
51 beq s3, zero, 1f
55 and s3, s2, 0x8
56 beq s3, zero, process_entry
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| D | cps-vec-ns16550.S | 79 move s3, ra
84 move ra, s3
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| /arch/ia64/lib/ |
| D | xor.S | 80 .rotr s1[6+1], s2[6+1], s3[6+1], d[2]
87 (p[0]) ld8.nta s3[0] = [r18], 8
89 (p[6]) xor d[0] = d[0], s3[6]
122 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], d[2]
128 (p[0]) ld8.nta s3[0] = [r18], 8
130 (p[6]) xor r20 = s3[6], s4[6]
167 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], s5[6+1], d[2]
173 (p[0]) ld8.nta s3[0] = [r18], 8
175 (p[6]) xor r21 = s3[6], s4[6]
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| /arch/mips/boot/compressed/ |
| D | head.S | 26 move s3, a3
46 move a3, s3
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| /arch/mips/include/asm/ |
| D | regdef.h | 45 #define s3 $19 macro
88 #define s3 $19 macro
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| D | asmmacro-64.h | 21 LONG_S s3, THREAD_REG19(\thread)
34 LONG_L s3, THREAD_REG19(\thread)
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| D | asmmacro-32.h | 68 LONG_S s3, THREAD_REG19(\thread)
81 LONG_L s3, THREAD_REG19(\thread)
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| /arch/x86/crypto/ |
| D | twofish-x86_64-asm_64.S | 36 #define s3 3072 /* S3 Array */ macro
89 xor s3(%r11,%rdi,4),%r9d;\
91 xor s3(%r11,%rdi,4),%r8d;\
127 xor s3(%r11,%rdi,4),%r9d;\
129 xor s3(%r11,%rdi,4),%r8d;\
156 mov s3(%r11,%rdi,4),%r8d;\
169 xor s3(%r11,%rdi,4),%r9d;\
192 mov s3(%r11,%rdi,4),%r8d;\
209 xor s3(%r11,%rdi,4),%r9d;\
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| D | twofish-i586-asm_32.S | 42 #define s3 3072 /* S3 Array */ macro
91 xor s3(%ebp,%edi,4),%esi;\
93 xor s3(%ebp,%edi,4),d ## D;\
129 xor s3(%ebp,%edi,4),%esi;\
131 xor s3(%ebp,%edi,4),d ## D;\
160 mov s3(%ebp,%edi,4),%esi;\
173 xor s3(%ebp,%edi,4),c ## D;\
198 mov s3(%ebp,%edi,4),%esi;\
211 xor s3(%ebp,%edi,4),c ## D;\
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| D | poly1305-sse2-x86_64.S | 36 #define s3 0x08(%rsp) macro
76 mov %eax,s3
119 # t1[0] = h0 * r0 + h2 * s3
125 movd s3,t2
131 # t2[1] = h1 * r0 + h3 * s3
137 movd s3,t4
180 # t3[0] = h4 * s3
182 movd s3,t3
341 # combine r3,u3 and s3=r3*5,v3=u3*5
405 # t1 += [ hc2[1] * s3, hc2[0] * v3 ]
[all …]
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| D | twofish-x86_64-asm_64-3way.S | 32 #define s3 3072 macro
159 g1g2_3(ab, cd, s0, s1, s2, s3, s0, s1, s2, s3, RX, RY); \
166 g1g2_3(ba, dc, s1, s2, s3, s0, s3, s0, s1, s2, RY, RX); \
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| D | blowfish-x86_64-asm_64.S | 33 #define s3 ((16 + 2 + (3 * 256)) * 4) macro
85 addl s3(CTX,RT2,4), RT0d; \
208 addl s3(CTX,RT3,4), RT0d; \
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| D | twofish-avx-x86_64-asm_64.S | 48 #define s3 3072 macro
139 G(RGI1, RGI2, x1, s0, s1, s2, s3); \
145 G(RGI3, RGI4, y1, s1, s2, s3, s0); \
151 G(RGI1, RGI2, x2, s0, s1, s2, s3); \
155 G(RGI3, RGI4, y2, s1, s2, s3, s0); \
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| /arch/mips/power/ |
| D | hibernate_asm.S | 24 PTR_S s3, PT_R19(t0)
54 PTR_L s3, PT_R19(t0)
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| /arch/alpha/include/uapi/asm/ |
| D | regdef.h | 19 #define s3 $12 macro
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| /arch/cris/arch-v32/mm/ |
| D | mmu.S | 50 move $s3, $r10 ; rw_mm_cause
108 move $s3, $r0 ; Get rw_mm_cause
124 move $s3, $r0 ; rw_mm_cause
149 move $s3, $r0 ; Get rw_mm_cause
190 move $s3, $r10 ; rw_mm_cause
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| /arch/arm/crypto/ |
| D | sha2-ce-core.S | 46 .macro add_update, ev, s0, s1, s2, s3 argument
49 sha256su1.32 q\s0, q\s2, q\s3
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| D | aes-neonbs-core.S | 201 t0, t1, t2, t3, s0, s1, s2, s3 argument
207 veor \s3, \t3, \t0
214 vand \s3, \s3, \s0
222 veor \t3, \t3, \s3
225 veor \t1, \t1, \s3
231 vorr \s3, \x4, \x0
234 veor \s0, \t0, \s3
238 veor \s3, \s0, \s2
241 vbsl \s0, \s1, \s3
242 vbsl \t0, \s1, \s3
[all …]
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| D | sha1-ce-core.S | 50 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
53 sha1su1.32 q\s0, q\s3
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| /arch/mips/fw/lib/ |
| D | call_o32.S | 57 REG_S s3,O32_FRAMESZ-8*SZREG(sp)
97 REG_L s3,O32_FRAMESZ-8*SZREG(sp)
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| /arch/x86/include/asm/uv/ |
| D | uv_mmrs.h | 1035 } s3; member
1144 } s3; member
1239 } s3; member
1539 } s3; member
1648 } s3; member
1743 } s3; member
1904 } s3; member
1949 } s3; member
1994 } s3; member
2171 } s3; member
[all …]
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| /arch/arm64/crypto/ |
| D | aes-neonbs-core.S | 141 t0, t1, t2, t3, s0, s1, s2, s3 argument
147 eor \s3, \t3, \t0
154 and \s3, \s3, \s0
162 eor \t3, \t3, \s3
165 eor \t1, \t1, \s3
171 orr \s3, \x4, \x0
174 eor \s0, \t0, \s3
178 eor \s3, \s0, \s2
181 bsl \s0, \s1, \s3
182 bsl \t0, \s1, \s3
[all …]
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| D | sha2-ce-core.S | 47 .macro add_update, ev, rc, s0, s1, s2, s3 argument
50 sha256su1 v\s0\().4s, v\s2\().4s, v\s3\().4s
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| D | sha1-ce-core.S | 55 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1
58 sha1su1 v\s0\().4s, v\s3\().4s
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