Searched refs:tsr (Results 1 – 11 of 11) sorted by relevance
23 #define user_mode(regs) ((((regs)->tsr) & 0x40) != 0)
586 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) in arm_next_watchdog()605 u32 tsr, new_tsr; in kvmppc_watchdog_func() local609 new_tsr = tsr = vcpu->arch.tsr; in kvmppc_watchdog_func()613 if (tsr & TSR_ENW) { in kvmppc_watchdog_func()614 if (tsr & TSR_WIS) in kvmppc_watchdog_func()617 new_tsr = tsr | TSR_WIS; in kvmppc_watchdog_func()619 new_tsr = tsr | TSR_ENW; in kvmppc_watchdog_func()621 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); in kvmppc_watchdog_func()652 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) in update_timer_ints()657 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) in update_timer_ints()[all …]
454 *spr_val = vcpu->arch.tsr; in kvmppc_booke_emulate_mfspr()
104 regs->tsr |= 0x40; /* set user mode */ in start_thread()
84 OFFSET(REGS_TSR, pt_regs, tsr); in foo()
41 pad_A[3], tsr, member
121 REG_PAIR(tsr, orig_a4);
225 __u32 tsr; /* KVM_SREGS_E_UPDATE_TSR */ member
228 u32 tsr; member
592 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */ member
2288 uint64_t tsr:36; member2290 uint64_t tsr:36;