Searched refs:vp_id (Results 1 – 9 of 9) sorted by relevance
| /arch/powerpc/include/asm/ |
| D | xive.h | 140 extern int xive_native_configure_queue(u32 vp_id, struct xive_q *q, u8 prio,
142 extern void xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio);
146 extern int xive_native_enable_vp(u32 vp_id);
147 extern int xive_native_disable_vp(u32 vp_id);
148 extern int xive_native_get_vp_info(u32 vp_id, u32 *out_cam_id, u32 *out_chip_id);
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| /arch/arm/mach-omap2/ |
| D | prm.h | 153 u32 (*vp_check_txdone)(u8 vp_id);
154 void (*vp_clear_txdone)(u8 vp_id);
181 u32 omap_prm_vp_check_txdone(u8 vp_id);
182 void omap_prm_vp_clear_txdone(u8 vp_id);
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| D | vp.h | 34 u32 (*check_txdone)(u8 vp_id);
35 void (*clear_txdone)(u8 vp_id);
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| D | prm3xxx.c | 100 static u32 omap3_prm_vp_check_txdone(u8 vp_id) in omap3_prm_vp_check_txdone() argument
102 struct omap3_vp *vp = &omap3_vp[vp_id]; in omap3_prm_vp_check_txdone()
110 static void omap3_prm_vp_clear_txdone(u8 vp_id) in omap3_prm_vp_clear_txdone() argument
112 struct omap3_vp *vp = &omap3_vp[vp_id]; in omap3_prm_vp_clear_txdone()
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| D | prm_common.c | 564 u32 omap_prm_vp_check_txdone(u8 vp_id) in omap_prm_vp_check_txdone() argument
572 return prm_ll_data->vp_check_txdone(vp_id); in omap_prm_vp_check_txdone()
581 void omap_prm_vp_clear_txdone(u8 vp_id) in omap_prm_vp_clear_txdone() argument
589 prm_ll_data->vp_clear_txdone(vp_id); in omap_prm_vp_clear_txdone()
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| D | prm44xx.c | 143 static u32 omap4_prm_vp_check_txdone(u8 vp_id) in omap4_prm_vp_check_txdone() argument
145 struct omap4_vp *vp = &omap4_vp[vp_id]; in omap4_prm_vp_check_txdone()
154 static void omap4_prm_vp_clear_txdone(u8 vp_id) in omap4_prm_vp_clear_txdone() argument
156 struct omap4_vp *vp = &omap4_vp[vp_id]; in omap4_prm_vp_clear_txdone()
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| /arch/powerpc/sysdev/xive/ |
| D | native.c | 119 int xive_native_configure_queue(u32 vp_id, struct xive_q *q, u8 prio, in xive_native_configure_queue() argument
140 rc = opal_xive_get_queue_info(vp_id, prio, NULL, NULL, in xive_native_configure_queue()
162 rc = opal_xive_set_queue_info(vp_id, prio, qpage_phys, order, flags); in xive_native_configure_queue()
183 static void __xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio) in __xive_native_disable_queue() argument
189 rc = opal_xive_set_queue_info(vp_id, prio, 0, 0, 0); in __xive_native_disable_queue()
198 void xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio) in xive_native_disable_queue() argument
200 __xive_native_disable_queue(vp_id, q, prio); in xive_native_disable_queue()
685 int xive_native_enable_vp(u32 vp_id) in xive_native_enable_vp() argument
690 rc = opal_xive_set_vp_info(vp_id, OPAL_XIVE_VP_ENABLED, 0); in xive_native_enable_vp()
699 int xive_native_disable_vp(u32 vp_id) in xive_native_disable_vp() argument
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| /arch/powerpc/kvm/ |
| D | book3s_xive.c | 171 rc = xive_native_configure_queue(xc->vp_id, q, prio, qpage, in xive_provision_queue()
1014 xive_native_disable_vp(xc->vp_id); in kvmppc_xive_cleanup_vcpu()
1020 xive_native_disable_queue(xc->vp_id, q, i); in kvmppc_xive_cleanup_vcpu()
1072 xc->vp_id = xive->vp_base + cpu; in kvmppc_xive_connect_vcpu()
1076 r = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id); in kvmppc_xive_connect_vcpu()
1113 r = xive_native_configure_queue(xc->vp_id, in kvmppc_xive_connect_vcpu()
1129 r = xive_native_enable_vp(xc->vp_id); in kvmppc_xive_connect_vcpu()
1134 r = xive_native_configure_irq(xc->vp_ipi, xc->vp_id, 0, XICS_IPI); in kvmppc_xive_connect_vcpu()
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| D | book3s_xive.h | 139 u32 vp_id; member
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