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/arch/powerpc/boot/dts/fsl/
Dmpc8548cds.dtsi74 reg = <0x1 0x0 0x1000>;
115 reg = <0x1>;
172 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
173 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
174 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
175 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
178 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
179 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
180 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
181 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
[all …]
Dmpc8572ds.dtsi161 reg = <0x1>;
250 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
251 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
252 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
253 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
256 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
257 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
258 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
259 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
262 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
[all …]
Dmpc8540ads.dts172 reg = <0x1>;
276 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
277 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
278 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
279 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
282 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
283 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
284 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
285 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
288 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
[all …]
Dmpc8560ads.dts161 reg = <0x1>;
281 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
293 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
315 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
316 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
317 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
318 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
321 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
322 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
323 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
[all …]
Dmpc8569mds.dts37 0x1 0x0 0x0 0xf8000000 0x00008000
84 reg = <0x11 0x1>;
147 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
149 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/
150 0x0 0x0 0x1 0x0 0x3 0x0 /* ENET1_TXD0_SER1_TXD0 */
151 0x0 0x1 0x1 0x0 0x3 0x0 /* ENET1_TXD1_SER1_TXD1 */
152 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */
153 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
155 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */
158 0x0 0x4 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */
[all …]
Dmpc8555cds.dts172 reg = <0x1>;
291 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
292 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
293 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
294 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
297 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
298 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
299 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
300 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
303 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
[all …]
Dmpc8541cds.dts172 reg = <0x1>;
291 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
292 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
293 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
294 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
297 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
298 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
299 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
300 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
303 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
[all …]
Dmpc8568mds.dts32 0x1 0x0 0xf8000000 0x00008000
56 reg = <0x5 0x1>;
97 reg = <0x1>;
132 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
133 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
134 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
135 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
136 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
137 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
138 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
[all …]
/arch/arm64/lib/
Dcopy_page.S34 prfm pldl1strm, [x1, #128]
35 prfm pldl1strm, [x1, #256]
36 prfm pldl1strm, [x1, #384]
39 ldp x2, x3, [x1]
40 ldp x4, x5, [x1, #16]
41 ldp x6, x7, [x1, #32]
42 ldp x8, x9, [x1, #48]
43 ldp x10, x11, [x1, #64]
44 ldp x12, x13, [x1, #80]
45 ldp x14, x15, [x1, #96]
[all …]
Dclear_user.S34 mov x2, x1 // save the size for fixup return
35 subs x1, x1, #8
39 subs x1, x1, #8
41 2: adds x1, x1, #4
44 sub x1, x1, #4
45 3: adds x1, x1, #2
48 sub x1, x1, #2
49 4: adds x1, x1, #1
/arch/x86/crypto/
Dserpent-avx-x86_64-asm_64.S70 #define S0_1(x0, x1, x2, x3, x4) \ argument
75 vpxor x1, tp, x3; \
76 vpand x0, x1, x1; \
77 vpxor x4, x1, x1; \
79 #define S0_2(x0, x1, x2, x3, x4) \ argument
83 vpand x1, x2, x2; \
85 vpxor RNOT, x1, x1; \
87 vpxor x2, x1, x1;
89 #define S1_1(x0, x1, x2, x3, x4) \ argument
90 vpxor x0, x1, tp; \
[all …]
Dserpent-avx2-asm_64.S66 #define S0_1(x0, x1, x2, x3, x4) \ argument
71 vpxor x1, tp, x3; \
72 vpand x0, x1, x1; \
73 vpxor x4, x1, x1; \
75 #define S0_2(x0, x1, x2, x3, x4) \ argument
79 vpand x1, x2, x2; \
81 vpxor RNOT, x1, x1; \
83 vpxor x2, x1, x1;
85 #define S1_1(x0, x1, x2, x3, x4) \ argument
86 vpxor x0, x1, tp; \
[all …]
Dserpent-sse2-x86_64-asm_64.S56 #define S0_1(x0, x1, x2, x3, x4) \ argument
62 pxor x1, x3; \
63 pand x0, x1; \
64 pxor x4, x1; \
66 #define S0_2(x0, x1, x2, x3, x4) \ argument
70 pand x1, x2; \
72 pxor RNOT, x1; \
74 pxor x2, x1;
76 #define S1_1(x0, x1, x2, x3, x4) \ argument
77 movdqa x1, x4; \
[all …]
Dserpent-sse2-i586-asm_32.S57 #define K(x0, x1, x2, x3, x4, i) \ argument
62 pxor RT0, x1; \
67 #define LK(x0, x1, x2, x3, x4, i) \ argument
72 pxor x0, x1; \
77 pxor x2, x1; \
78 movdqa x1, x4; \
79 pslld $1, x1; \
81 por x4, x1; \
90 movdqa x1, x4; \
92 pxor x1, x0; \
[all …]
/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-fs4.dtsi57 mboxes = <&raid_mbox 0 0x1 0xff00>,
58 <&raid_mbox 1 0x1 0xff00>,
59 <&raid_mbox 2 0x1 0xff00>,
60 <&raid_mbox 3 0x1 0xff00>;
65 mboxes = <&raid_mbox 4 0x1 0xff00>,
66 <&raid_mbox 5 0x1 0xff00>,
67 <&raid_mbox 6 0x1 0xff00>,
68 <&raid_mbox 7 0x1 0xff00>;
73 mboxes = <&raid_mbox 8 0x1 0xff00>,
74 <&raid_mbox 9 0x1 0xff00>,
[all …]
/arch/arm64/mm/
Dcache.S59 cmp x4, x1
69 cmp x4, x1
75 uaccess_ttbr0_disable x1, x2
93 dcache_by_line_op civac, sy, x0, x1, x2, x3
107 dcache_by_line_op cvau, ish, x0, x1, x2, x3
130 add x1, x1, x0
133 tst x1, x3 // end cache line aligned?
134 bic x1, x1, x3
136 dc civac, x1 // clean & invalidate D / U line
144 cmp x0, x1
[all …]
/arch/powerpc/boot/dts/
Dstxssa8555.dts290 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
291 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
292 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
293 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
296 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
297 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
298 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
299 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
302 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
303 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1
[all …]
Dmvme5100.dts112 0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
120 0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
121 0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
122 0x6800 0x0 0x0 0x3 &mpic 0x7 0x1
123 0x6800 0x0 0x0 0x4 &mpic 0x8 0x1
126 0x7000 0x0 0x0 0x1 &mpic 0x2 0x1
131 0x8000 0x0 0x0 0x1 &mpic 0x9 0x1
132 0x8000 0x0 0x0 0x2 &mpic 0xa 0x1
133 0x8000 0x0 0x0 0x3 &mpic 0xb 0x1
134 0x8000 0x0 0x0 0x4 &mpic 0xc 0x1
[all …]
/arch/arm64/kvm/hyp/
Dhyp-entry.S38 mov x0, x1
39 mov x1, x2
58 stp x0, x1, [sp, #-16]!
66 mrs x1, vttbr_el2 // If vttbr is valid, the guest
67 cbnz x1, el1_hvc_guest // called HVC
70 ldp x0, x1, [sp], #16
107 ldr x1, [sp] // Guest's x0
124 ldr x1, [sp, #8] // Guest's x1
128 bfi x0, x1, #VCPU_WORKAROUND_2_FLAG_SHIFT, #1
142 mov x1, xzr
[all …]
Dentry.S63 save_callee_saved_regs x1
68 ldp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
94 add x1, x1, #VCPU_CONTEXT
99 stp x2, x3, [x1, #CPU_XREG_OFFSET(2)]
105 stp x2, x3, [x1, #CPU_XREG_OFFSET(0)]
106 stp x4, x5, [x1, #CPU_XREG_OFFSET(4)]
107 stp x6, x7, [x1, #CPU_XREG_OFFSET(6)]
108 stp x8, x9, [x1, #CPU_XREG_OFFSET(8)]
109 stp x10, x11, [x1, #CPU_XREG_OFFSET(10)]
110 stp x12, x13, [x1, #CPU_XREG_OFFSET(12)]
[all …]
/arch/arm64/boot/dts/qcom/
Dpm8916.dtsi18 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
96 reg = <0x1 SPMI_USID>;
107 interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
108 <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
109 <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
110 <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
111 <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
112 <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
113 <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
114 <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
[all …]
/arch/arm64/include/asm/
Datomic_lse.h33 register atomic_t *x1 asm ("x1") = v; \
38 : "r" (x1) \
53 register atomic_t *x1 asm ("x1") = v; \ in ATOMIC_OP()
61 : "r" (x1) \ in ATOMIC_OP()
85 register atomic_t *x1 asm ("x1") = v; \
95 : "r" (x1) \
111 register atomic_t *x1 asm ("x1") = v;
121 : "r" (x1)
129 register atomic_t *x1 asm ("x1") = v; \
139 : "r" (x1) \
[all …]
/arch/arm/boot/dts/
Dimx25-eukrea-mbimxsd25-baseboard.dts110 MX25_PAD_LD0__LD0 0x1
111 MX25_PAD_LD1__LD1 0x1
112 MX25_PAD_LD2__LD2 0x1
113 MX25_PAD_LD3__LD3 0x1
114 MX25_PAD_LD4__LD4 0x1
115 MX25_PAD_LD5__LD5 0x1
116 MX25_PAD_LD6__LD6 0x1
117 MX25_PAD_LD7__LD7 0x1
118 MX25_PAD_LD8__LD8 0x1
119 MX25_PAD_LD9__LD9 0x1
[all …]
/arch/microblaze/boot/dts/
Dsystem.dts51 #cpus = <0x1>;
69 xlnx,allow-dcache-wr = <0x1>;
70 xlnx,allow-icache-wr = <0x1>;
73 xlnx,d-lmb = <0x1>;
75 xlnx,d-plb = <0x1>;
78 xlnx,dcache-always-used = <0x1>;
81 xlnx,dcache-use-fsl = <0x1>;
82 xlnx,debug-enabled = <0x1>;
83 xlnx,div-zero-exception = <0x1>;
85 xlnx,dynamic-bus-sizing = <0x1>;
[all …]
/arch/sparc/include/asm/
Dsfp-machine_32.h78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
87 "%rJ" ((USItype)(x1)), \
93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
102 "%rJ" ((USItype)(x1)), \
108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
124 "%rJ" ((USItype)(x1)), \
133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
149 "%rJ" ((USItype)(x1)), \
158 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) argument
160 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y… argument
[all …]

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