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Searched refs:xc (Results 1 – 25 of 166) sorted by relevance

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/arch/powerpc/kvm/
Dbook3s_xive_template.c14 static void GLUE(X_PFX,ack_pending)(struct kvmppc_xive_vcpu *xc) in GLUE()
33 if (pipr >= xc->hw_cppr) in GLUE()
52 xc->pending |= 1 << cppr; in GLUE()
56 if (cppr >= xc->hw_cppr) in GLUE()
58 smp_processor_id(), cppr, xc->hw_cppr); in GLUE()
66 xc->hw_cppr = cppr; in GLUE()
125 static u32 GLUE(X_PFX,scan_interrupts)(struct kvmppc_xive_vcpu *xc, in GLUE()
132 while ((xc->mfrr != 0xff || pending != 0) && hirq == 0) { in GLUE()
152 if (prio >= xc->mfrr && xc->mfrr < xc->cppr) { in GLUE()
153 prio = xc->mfrr; in GLUE()
[all …]
Dbook3s_xive.c98 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu; in xive_attach_escalation() local
99 struct xive_q *q = &xc->queues[prio]; in xive_attach_escalation()
104 if (xc->esc_virq[prio]) in xive_attach_escalation()
108 xc->esc_virq[prio] = irq_create_mapping(NULL, q->esc_irq); in xive_attach_escalation()
109 if (!xc->esc_virq[prio]) { in xive_attach_escalation()
111 prio, xc->server_num); in xive_attach_escalation()
121 vcpu->kvm->arch.lpid, xc->server_num, prio); in xive_attach_escalation()
124 prio, xc->server_num); in xive_attach_escalation()
128 rc = request_irq(xc->esc_virq[prio], xive_esc_irq, in xive_attach_escalation()
132 prio, xc->server_num); in xive_attach_escalation()
[all …]
/arch/powerpc/sysdev/xive/
Dcommon.c139 static u32 xive_scan_interrupts(struct xive_cpu *xc, bool just_peek) in xive_scan_interrupts() argument
145 while (xc->pending_prio != 0) { in xive_scan_interrupts()
148 prio = ffs(xc->pending_prio) - 1; in xive_scan_interrupts()
152 irq = xive_read_eq(&xc->queue[prio], just_peek); in xive_scan_interrupts()
159 xc->pending_prio &= ~(1 << prio); in xive_scan_interrupts()
166 q = &xc->queue[prio]; in xive_scan_interrupts()
181 if (prio != xc->cppr) { in xive_scan_interrupts()
183 xc->cppr = prio; in xive_scan_interrupts()
239 struct xive_cpu *xc = per_cpu(xive_cpu, cpu); in xmon_xive_do_dump() local
242 xmon_printf(" pp=%02x cppr=%02x\n", xc->pending_prio, xc->cppr); in xmon_xive_do_dump()
[all …]
Dxive-internal.h40 int (*setup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
41 void (*cleanup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);
42 void (*setup_cpu)(unsigned int cpu, struct xive_cpu *xc);
43 void (*teardown_cpu)(unsigned int cpu, struct xive_cpu *xc);
47 void (*update_pending)(struct xive_cpu *xc);
52 int (*get_ipi)(unsigned int cpu, struct xive_cpu *xc);
53 void (*put_ipi)(unsigned int cpu, struct xive_cpu *xc);
Dspapr.c392 static int xive_spapr_setup_queue(unsigned int cpu, struct xive_cpu *xc, in xive_spapr_setup_queue() argument
395 struct xive_q *q = &xc->queue[prio]; in xive_spapr_setup_queue()
406 static void xive_spapr_cleanup_queue(unsigned int cpu, struct xive_cpu *xc, in xive_spapr_cleanup_queue() argument
409 struct xive_q *q = &xc->queue[prio]; in xive_spapr_cleanup_queue()
431 static int xive_spapr_get_ipi(unsigned int cpu, struct xive_cpu *xc) in xive_spapr_get_ipi() argument
440 xc->hw_ipi = irq; in xive_spapr_get_ipi()
444 static void xive_spapr_put_ipi(unsigned int cpu, struct xive_cpu *xc) in xive_spapr_put_ipi() argument
446 if (!xc->hw_ipi) in xive_spapr_put_ipi()
449 xive_irq_bitmap_free(xc->hw_ipi); in xive_spapr_put_ipi()
450 xc->hw_ipi = 0; in xive_spapr_put_ipi()
[all …]
Dnative.c204 static int xive_native_setup_queue(unsigned int cpu, struct xive_cpu *xc, u8 prio) in xive_native_setup_queue() argument
206 struct xive_q *q = &xc->queue[prio]; in xive_native_setup_queue()
217 static void xive_native_cleanup_queue(unsigned int cpu, struct xive_cpu *xc, u8 prio) in xive_native_cleanup_queue() argument
219 struct xive_q *q = &xc->queue[prio]; in xive_native_cleanup_queue()
249 static int xive_native_get_ipi(unsigned int cpu, struct xive_cpu *xc) in xive_native_get_ipi() argument
273 xc->hw_ipi = irq; in xive_native_get_ipi()
308 static void xive_native_put_ipi(unsigned int cpu, struct xive_cpu *xc) in xive_native_put_ipi() argument
313 if (!xc->hw_ipi) in xive_native_put_ipi()
316 rc = opal_xive_free_irq(xc->hw_ipi); in xive_native_put_ipi()
321 xc->hw_ipi = 0; in xive_native_put_ipi()
[all …]
/arch/arm/mach-netx/include/mach/
Dxc.h23 struct xc { struct
34 int xc_reset(struct xc *x); argument
35 int xc_stop(struct xc* x);
36 int xc_start(struct xc *x);
37 int xc_running(struct xc *x);
38 int xc_request_firmware(struct xc* x);
39 struct xc* request_xc(int xcno, struct device *dev);
40 void free_xc(struct xc *x);
/arch/arm/mach-netx/
Dxc.c53 int xc_stop(struct xc *x) in xc_stop()
61 int xc_start(struct xc *x) in xc_start()
69 int xc_running(struct xc *x) in xc_running()
77 int xc_reset(struct xc *x) in xc_reset()
83 static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size) in xc_check_ptr()
98 static int xc_patch(struct xc *x, const void *patch, int count) in xc_patch()
115 int xc_request_firmware(struct xc *x) in xc_request_firmware()
180 struct xc *request_xc(int xcno, struct device *dev) in request_xc()
182 struct xc *x = NULL; in request_xc()
191 x = kmalloc(sizeof (struct xc), GFP_KERNEL); in request_xc()
[all …]
DMakefile7 obj-y += time.o generic.o pfifo.o xc.o
/arch/mips/math-emu/
Dsp_rint.c40 if (xc == IEEE754_CLASS_SNAN) in ieee754sp_rint()
43 if ((xc == IEEE754_CLASS_QNAN) || in ieee754sp_rint()
44 (xc == IEEE754_CLASS_INF) || in ieee754sp_rint()
45 (xc == IEEE754_CLASS_ZERO)) in ieee754sp_rint()
Ddp_rint.c40 if (xc == IEEE754_CLASS_SNAN) in ieee754dp_rint()
43 if ((xc == IEEE754_CLASS_QNAN) || in ieee754dp_rint()
44 (xc == IEEE754_CLASS_INF) || in ieee754dp_rint()
45 (xc == IEEE754_CLASS_ZERO)) in ieee754dp_rint()
Dieee754int.h51 static inline int ieee754_class_nan(int xc) in ieee754_class_nan() argument
53 return xc >= IEEE754_CLASS_SNAN; in ieee754_class_nan()
57 unsigned xm; int xe; int xs __maybe_unused; int xc
89 #define EXPLODEXSP EXPLODESP(x, xc, xs, xe, xm)
95 u64 xm; int xe; int xs __maybe_unused; int xc
127 #define EXPLODEXDP EXPLODEDP(x, xc, xs, xe, xm)
153 #define FLUSHXDP FLUSHDP(x, xc, xs, xe, xm)
156 #define FLUSHXSP FLUSHSP(x, xc, xs, xe, xm)
Dsp_2008class.c38 switch(xc) { in ieee754sp_2008class()
52 pr_err("Unknown class: %d\n", xc); in ieee754sp_2008class()
Ddp_2008class.c38 switch(xc) { in ieee754dp_2008class()
52 pr_err("Unknown class: %d\n", xc); in ieee754dp_2008class()
Dsp_cmp.c38 if (ieee754_class_nan(xc) || ieee754_class_nan(yc)) { in ieee754sp_cmp()
40 xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN) in ieee754sp_cmp()
Ddp_cmp.c38 if (ieee754_class_nan(xc) || ieee754_class_nan(yc)) { in ieee754dp_cmp()
40 xc == IEEE754_CLASS_SNAN || yc == IEEE754_CLASS_SNAN) in ieee754dp_cmp()
Dsp_maddf.c48 if (xc == IEEE754_CLASS_SNAN) in _sp_maddf()
54 if (xc == IEEE754_CLASS_QNAN) in _sp_maddf()
63 switch (CLPAIR(xc, yc)) { in _sp_maddf()
/arch/cris/boot/dts/
Dp1343.dts41 gpios = <&gio 0 GPIO_ACTIVE_LOW 0xc>;
47 gpios = <&gio 1 GPIO_ACTIVE_LOW 0xc>;
52 gpios = <&gio 2 GPIO_ACTIVE_LOW 0xc>;
57 gpios = <&gio 3 GPIO_ACTIVE_LOW 0xc>;
62 gpios = <&gio 4 GPIO_ACTIVE_LOW 0xc>;
/arch/powerpc/boot/dts/fsl/
Dcyrus_p5020.dts80 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
83 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
96 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
111 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
126 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
141 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
Dmpc8536ds_36b.dts49 ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
64 ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
79 ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
94 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
Dmpc8548cds_36b.dts37 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000
44 ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
75 ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>;
Dmpc8572ds_36b.dts40 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
55 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
70 ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
Dp1020rdb_36b.dts36 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
51 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
Dt4240rdb.dts294 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
309 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
324 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
339 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
356 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
359 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
Dp5020ds.dts219 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
222 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
335 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
350 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
365 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
380 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000

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