Searched refs:BIT14 (Results 1 – 19 of 19) sorted by relevance
| /drivers/staging/emxx_udc/ |
| D | emxx_udc.h | 81 #define BIT14 0x00004000 macro
128 #define UFRAME (BIT14 + BIT13 + BIT12)
157 #define EP6_INT BIT14
184 #define EP6_EN BIT14
225 #define EP0_OUT_NULL BIT14
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| /drivers/staging/rtl8723bs/include/ |
| D | rtl8723b_spec.h | 222 #define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */
250 #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */
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| D | hal_com_reg.h | 630 #define RRSR_MCS2 BIT14
798 #define IMR_PSTIMEOUT BIT14 /* Power save time out interrupt */
846 #define PHIMR_BCNDMAINT_E BIT14
897 #define UHIMR_BCNDMAINT_E BIT14
952 #define IMR_BCNDMAINT_E_88E BIT14 /* Beacon DMA Interrupt Extension for Win7 */
981 #define IMR_BCNDOK1_88E BIT14 /* Beacon Queue DMA OK Interrup 1 */
1045 #define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC = 1 MFC-->HTC = 0 */
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| D | osdep_service.h | 43 #define BIT14 0x00004000 macro
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| D | rtw_mlme_ext.h | 66 #define DYNAMIC_BB_DYNAMIC_ATC BIT14/* ODM_BB_DYNAMIC_ATC */
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_hw.h | 224 #define IMR_TIMEOUT0 BIT14
255 #define TPPoll_StopHigh BIT14
385 #define RRSR_MCS2 BIT14
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| /drivers/staging/rtlwifi/btcoexist/ |
| D | halbt_precomp.h | 66 #define BIT14 0x00004000 macro
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| /drivers/net/wireless/realtek/rtlwifi/btcoexist/ |
| D | halbt_precomp.h | 68 #define BIT14 0x00004000 macro
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| /drivers/staging/rtl8723bs/hal/ |
| D | Hal8723BReg.h | 396 #define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */
424 #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrup 1 */
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| D | odm_debug.h | 83 #define ODM_COMP_MP BIT14
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| D | odm.h | 453 ODM_BB_CFO_TRACKING = BIT14,
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| D | odm_DIG.c | 955 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); in odm_FalseAlarmCounterStatistics()
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| /drivers/staging/rtl8192e/ |
| D | rtl819x_Qos.h | 32 #define BIT14 0x00004000 macro
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| /drivers/tty/ |
| D | synclink.c | 559 #define MISCSTATUS_RXC BIT14
579 #define SICR_RXC_INACTIVE BIT14
580 #define SICR_RXC (BIT15|BIT14)
1840 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()
4693 RegValue |= BIT14; in usc_set_sdlc_mode()
4697 RegValue |= BIT15 | BIT14; in usc_set_sdlc_mode()
4737 case HDLC_ENCODING_NRZI_MARK: RegValue |= BIT14; break; in usc_set_sdlc_mode()
4738 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 | BIT13; break; in usc_set_sdlc_mode()
4741 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14; break; in usc_set_sdlc_mode()
4742 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break; in usc_set_sdlc_mode()
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| D | synclink_gt.c | 384 #define MASK_BREAK BIT14
411 #define RXIDLE BIT14
412 #define RXBREAK BIT14
3992 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14)); in rx_start()
4000 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14)); in rx_start()
4227 val = BIT15 + BIT14 + BIT0; in async_mode()
4281 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4356 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4463 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
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| /drivers/scsi/ |
| D | dc395x.h | 62 #define BIT14 0x00004000 macro
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| /drivers/net/wireless/realtek/rtlwifi/rtl8192de/ |
| D | reg.h | 394 #define RRSR_MCS2 BIT14
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| /drivers/scsi/lpfc/ |
| D | lpfc_hw4.h | 710 #define LPFC_SLI4_INTR14 BIT14
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| /drivers/char/pcmcia/ |
| D | synclink_cs.c | 291 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
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