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Searched refs:CMDR (Results 1 – 11 of 11) sorted by relevance

/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dhw.c595 rtl_write_byte(rtlpriv, CMDR, 0); in _rtl92se_macconfig_before_fwdownload()
682 rtl_write_word(rtlpriv, CMDR, 0x07FC); in _rtl92se_macconfig_before_fwdownload()
731 rtl_write_word(rtlpriv, CMDR, 0x37FC); in _rtl92se_macconfig_before_fwdownload()
746 tmpu1b = rtl_read_byte(rtlpriv, CMDR); in _rtl92se_macconfig_before_fwdownload()
747 rtl_write_byte(rtlpriv, CMDR, tmpu1b & (~TXDMA_EN)); in _rtl92se_macconfig_before_fwdownload()
750 rtl_write_byte(rtlpriv, CMDR, tmpu1b | TXDMA_EN); in _rtl92se_macconfig_before_fwdownload()
778 rtl_write_word(rtlpriv, CMDR, (BBRSTN | BB_GLB_RSTN | in _rtl92se_macconfig_after_fwdownload()
1017 rtl_write_dword(rtlpriv, CMDR, 0x37FC); in rtl92se_hw_init()
1337 rtl_write_word(rtlpriv, CMDR, 0x57FC); in _rtl92s_phy_set_rfhalt()
1339 rtl_write_word(rtlpriv, CMDR, 0x77FC); in _rtl92s_phy_set_rfhalt()
[all …]
Dphy.c512 rtl_write_word(rtlpriv, CMDR, 0x57FC); in _rtl92se_phy_set_rf_sleep()
515 rtl_write_word(rtlpriv, CMDR, 0x77FC); in _rtl92se_phy_set_rf_sleep()
519 rtl_write_word(rtlpriv, CMDR, 0x37FC); in _rtl92se_phy_set_rf_sleep()
522 rtl_write_word(rtlpriv, CMDR, 0x77FC); in _rtl92se_phy_set_rf_sleep()
525 rtl_write_word(rtlpriv, CMDR, 0x57FC); in _rtl92se_phy_set_rf_sleep()
570 rtl_write_word(rtlpriv, CMDR, 0x37FC); in rtl92s_phy_set_rf_power_state()
Dreg.h54 #define CMDR 0x0040 macro
/drivers/staging/rtl8192u/
Dr8192U_hw.h116 CMDR = 0x037, // Command register enumerator
Dr8192U_core.c902 read_nic_byte(dev, CMDR, &cmd); in rtl8192_rtx_disable()
903 write_nic_byte(dev, CMDR, cmd & ~(CR_TE | CR_RE)); in rtl8192_rtx_disable()
2870 write_nic_byte(dev, CMDR, CR_RE | CR_TE); in rtl8192_adapter_start()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h132 CMDR = 0x037, enumerator
Dr8192E_dev.c771 rtl92e_writeb(dev, CMDR, CR_RE | CR_TE); in rtl92e_start_adapter()
2101 rtl92e_writeb(dev, CMDR, u1bTmp); in rtl92e_stop_adapter()
/drivers/net/wireless/admtek/
Dadm8211.h50 __le32 CMDR; /* 0x88 CSR18 */ member
Dadm8211.c1136 reg = ADM8211_CSR_READ(CMDR); in adm8211_hw_init()
1139 ADM8211_CSR_WRITE(CMDR, reg); in adm8211_hw_init()
/drivers/net/wan/
Ddscc4.c267 #define CMDR 0x00 macro
1107 scc_writel(TxSccRes | RxSccRes, dpriv, dev, CMDR); in dscc4_open()
1831 scc_writel(RxSccRes, dpriv, dev, CMDR); in dscc4_rx_irq()
/drivers/char/pcmcia/
Dsynclink_cs.c250 #define CMDR 0x20 macro
701 write_reg(info, (unsigned char) (channel + CMDR), cmd); in issue_command()