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Searched refs:CP_ME_HALT (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770d.h336 #define CP_ME_HALT (1 << 28) macro
Dnid.h319 #define CP_ME_HALT (1 << 28) macro
Dni.c1464 WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); in cayman_cp_enable()
1842 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT); in cayman_gpu_soft_reset()
Dsid.h1030 #define CP_ME_HALT (1 << 28) macro
Dcikd.h1113 #define CP_ME_HALT (1 << 28) macro
Drv770.c1083 WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); in r700_cp_stop()
Devergreend.h462 #define CP_ME_HALT (1 << 28) macro
Dsi.c3467 WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT)); in si_cp_enable()
3876 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT); in si_gpu_soft_reset()
4045 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT); in si_gpu_pci_config_reset()
Devergreen.c3904 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT); in evergreen_gpu_soft_reset()
4014 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT); in evergreen_gpu_pci_config_reset()
Dcik.c3895 WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT)); in cik_cp_gfx_enable()
4967 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT); in cik_gpu_soft_reset()
5171 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT); in cik_gpu_pci_config_reset()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h1029 #define CP_ME_HALT (1 << 28) macro