| /drivers/scsi/aacraid/ |
| D | aacraid.h | 1088 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
1089 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) argument
1090 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) argument
1091 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) argument
1150 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) argument
1151 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) argument
1152 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) argument
1153 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) argument
1168 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) argument
1169 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) argument
[all …]
|
| /drivers/dma/ |
| D | txx9dmac.c | 299 channel64_readl(dc, CSR)); in txx9dmac_dump_regs()
311 channel32_readl(dc, CSR)); in txx9dmac_dump_regs()
343 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_dostart()
353 channel64_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
374 channel32_writel(dc, CSR, 0xffffffff); in txx9dmac_dostart()
484 desc->SAIR, desc->DAIR, desc->CCR, desc->CSR); in txx9dmac_dump_desc()
497 d->SAIR, d->DAIR, d->CCR, d->CSR); in txx9dmac_dump_desc()
523 channel_writel(dc, CSR, errors); in txx9dmac_handle_error()
549 csr = channel64_readl(dc, CSR); in txx9dmac_scan_descriptors()
550 channel64_writel(dc, CSR, csr); in txx9dmac_scan_descriptors()
[all …]
|
| D | txx9dmac.h | 81 TXX9_DMA_REG32(CSR); /* Channel Status Register */
91 u32 CSR; member
|
| D | omap-dma.c | 365 omap_dma_chan_read(c, CSR); in omap_dma_clear_csr()
367 omap_dma_chan_write(c, CSR, ~0); in omap_dma_clear_csr()
372 unsigned val = omap_dma_chan_read(c, CSR); in omap_dma_get_csr()
375 omap_dma_chan_write(c, CSR, val); in omap_dma_get_csr()
|
| D | Kconfig | 448 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
452 Enable support for the CSR SiRFprimaII DMA engine.
|
| /drivers/net/ethernet/qlogic/qlge/ |
| D | qlge_mpi.c | 9 tmp = ql_read32(qdev, CSR); in ql_unpause_mpi_risc()
13 ql_write32(qdev, CSR, CSR_CMD_CLR_PAUSE); in ql_unpause_mpi_risc()
23 ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE); in ql_pause_mpi_risc()
25 tmp = ql_read32(qdev, CSR); in ql_pause_mpi_risc()
40 ql_write32(qdev, CSR, CSR_CMD_SET_RST); in ql_hard_reset_mpi_risc()
42 tmp = ql_read32(qdev, CSR); in ql_hard_reset_mpi_risc()
44 ql_write32(qdev, CSR, CSR_CMD_CLR_RST); in ql_hard_reset_mpi_risc()
175 if (ql_read32(qdev, CSR) & CSR_HRI) in ql_exec_mb_cmd()
194 ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT); in ql_exec_mb_cmd()
517 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); in ql_mpi_handler()
[all …]
|
| D | qlge.h | 803 CSR = 0x14, enumerator
|
| D | qlge_dbg.c | 1471 DUMP_REG(qdev, CSR); in ql_dump_regs()
|
| /drivers/misc/eeprom/ |
| D | Kconfig | 104 tristate "IDT 89HPESx PCIe-swtiches EEPROM / CSR support"
|
| /drivers/regulator/ |
| D | bcm590xx-regulator.c | 299 BCM590XX_MATCH(csr, CSR),
|
| /drivers/net/ethernet/renesas/ |
| D | ravb.h | 55 CSR = 0x000C, enumerator
|
| D | ravb_main.c | 81 error = ravb_wait(ndev, CSR, CSR_OPS, CSR_OPS_CONFIG); in ravb_config()
661 error = ravb_wait(ndev, CSR, CSR_TPO0 | CSR_TPO1 | CSR_TPO2 | CSR_TPO3, in ravb_stop_dma()
670 error = ravb_wait(ndev, CSR, CSR_RPO, 0); in ravb_stop_dma()
|
| /drivers/pinctrl/ |
| D | Kconfig | 221 bool "CSR SiRFprimaII pin controller driver"
|
| /drivers/mmc/host/ |
| D | Kconfig | 249 tristate "SDHCI support on CSR SiRFprimaII and SiRFmarco SoCs"
799 the Cypress Astoria chip with firmware compliant with CSR's
802 CSR boards with this device include: USB<>SDIO (M1985v2),
|
| /drivers/spi/ |
| D | Kconfig | 623 tristate "CSR SiRFprimaII SPI controller"
627 SPI driver for CSR SiRFprimaII SoCs
|
| /drivers/bluetooth/ |
| D | Kconfig | 117 USB Bluetooth devices based on CSR BlueCore chip, including PCMCIA and
|
| /drivers/i2c/busses/ |
| D | Kconfig | 914 tristate "CSR SiRFprimaII I2C interface"
918 CSR SiRFprimaII I2C interface.
|
| /drivers/input/misc/ |
| D | Kconfig | 791 tristate "CSR SiRFSoC power on/off/suspend key support"
|
| /drivers/tty/serial/ |
| D | Kconfig | 298 Support for the on-chip UART on the CSR SiRFprimaII series,
|
| /drivers/watchdog/ |
| D | Kconfig | 627 Support for CSR SiRFprimaII and SiRFatlasVI watchdog. When
|