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Searched refs:MC_SEQ_RD_CTL_D0 (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
Dbtcd.h109 #define MC_SEQ_RD_CTL_D0 0x28b4 macro
Dbtc_dpm.c1871 case MC_SEQ_RD_CTL_D0 >> 2: in btc_check_s0_mc_reg_index()
2033 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0)); in btc_initialize_mc_reg_table()
Dnid.h785 #define MC_SEQ_RD_CTL_D0 0x28b4 macro
Dsid.h546 #define MC_SEQ_RD_CTL_D0 0x28b4 macro
Dcikd.h661 #define MC_SEQ_RD_CTL_D0 0x28b4 macro
Devergreend.h291 #define MC_SEQ_RD_CTL_D0 0x28b4 macro
Dni_dpm.c2783 case MC_SEQ_RD_CTL_D0 >> 2: in ni_check_s0_mc_reg_index()
2890 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0)); in ni_initialize_mc_reg_table()
Dcypress_dpm.c988 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RD_CTL_D0 >> 2; in cypress_set_mc_reg_address_table()
Dci_dpm.c4418 case MC_SEQ_RD_CTL_D0 >> 2: in ci_check_s0_mc_reg_index()
4627 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0)); in ci_initialize_mc_reg_table()
Dsi_dpm.c5441 case MC_SEQ_RD_CTL_D0 >> 2: in si_check_s0_mc_reg_index()
5552 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0)); in si_initialize_mc_reg_table()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h548 #define MC_SEQ_RD_CTL_D0 0xA2D macro
Dsi_dpm.c5898 case MC_SEQ_RD_CTL_D0: in si_check_s0_mc_reg_index()
6009 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0)); in si_initialize_mc_reg_table()