| /drivers/net/ethernet/chelsio/cxgb/ |
| D | pm3393.c | 48 #define OFFSET(REG_ADDR) ((REG_ADDR) << 2) macro
96 t1_tpi_read(cmac->adapter, OFFSET(reg), data32); in pmread()
102 t1_tpi_write(cmac->adapter, OFFSET(reg), data32); in pmwrite()
429 t1_tpi_read((mac)->adapter, OFFSET(name), &val0); \
430 t1_tpi_read((mac)->adapter, OFFSET((name)+1), &val1); \
431 t1_tpi_read((mac)->adapter, OFFSET((name)+2), &val2); \
600 t1_tpi_write(adapter, OFFSET(0x0001), 0x00008000); in pm3393_mac_create()
601 t1_tpi_write(adapter, OFFSET(0x0001), 0x00000000); in pm3393_mac_create()
602 t1_tpi_write(adapter, OFFSET(0x2308), 0x00009800); in pm3393_mac_create()
603 t1_tpi_write(adapter, OFFSET(0x2305), 0x00001001); /* PL4IO Enable */ in pm3393_mac_create()
[all …]
|
| D | my3126.c | 35 #define OFFSET(REG_ADDR) (REG_ADDR << 2) macro
61 t1_tpi_write(adapter, OFFSET(SUNI1x10GEXP_REG_MSTAT_CONTROL), in my3126_interrupt_handler()
64 OFFSET(SUNI1x10GEXP_REG_MSTAT_COUNTER_1_LOW), &act_count); in my3126_interrupt_handler()
66 OFFSET(SUNI1x10GEXP_REG_MSTAT_COUNTER_33_LOW), &val); in my3126_interrupt_handler()
|
| /drivers/gpio/ |
| D | gpio-mb86s7x.c | 37 #define OFFSET(x) BIT((x) % 8) macro
55 if (!(val & OFFSET(gpio))) { in mb86s70_gpio_request()
60 val &= ~OFFSET(gpio); in mb86s70_gpio_request()
77 val |= OFFSET(gpio); in mb86s70_gpio_free()
92 val &= ~OFFSET(gpio); in mb86s70_gpio_direction_input()
111 val |= OFFSET(gpio); in mb86s70_gpio_direction_output()
113 val &= ~OFFSET(gpio); in mb86s70_gpio_direction_output()
117 val |= OFFSET(gpio); in mb86s70_gpio_direction_output()
129 return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio)); in mb86s70_gpio_get()
142 val |= OFFSET(gpio); in mb86s70_gpio_set()
[all …]
|
| /drivers/xen/xen-pciback/ |
| D | conf_space.c | 182 field_start = OFFSET(cfg_entry); in xen_pcibk_config_read()
183 field_end = OFFSET(cfg_entry) + field->size; in xen_pcibk_config_read()
226 field_start = OFFSET(cfg_entry); in xen_pcibk_config_write()
227 field_end = OFFSET(cfg_entry) + field->size; in xen_pcibk_config_write()
329 field->reset(dev, OFFSET(cfg_entry), cfg_entry->data); in xen_pcibk_config_reset_dev()
349 field->release(dev, OFFSET(cfg_entry), cfg_entry->data); in xen_pcibk_config_free_dev()
375 err = xen_pcibk_field_is_dup(dev, OFFSET(cfg_entry)); in xen_pcibk_config_add_field_offset()
380 tmp = field->init(dev, OFFSET(cfg_entry)); in xen_pcibk_config_add_field_offset()
391 OFFSET(cfg_entry)); in xen_pcibk_config_add_field_offset()
|
| D | conf_space.h | 70 #define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset) macro
|
| D | conf_space_quirks.c | 56 if (OFFSET(cfg_entry) == reg) { in xen_pcibk_field_is_dup()
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | nbio_v7_0.c | 88 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index); in nbio_v7_0_sdma_doorbell_range()
108 …ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index… in nbio_v7_0_ih_doorbell_range()
|
| D | nbio_v6_1.c | 91 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index); in nbio_v6_1_sdma_doorbell_range()
131 …ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index… in nbio_v6_1_ih_doorbell_range()
|
| D | tonga_ih.c | 153 OFFSET, adev->irq.ih.doorbell_index); in tonga_ih_irq_init()
|
| D | vega10_ih.c | 146 OFFSET, adev->irq.ih.doorbell_index); in vega10_ih_irq_init()
|
| D | sdma_v4_0.c | 636 OFFSET, ring->doorbell_index); in sdma_v4_0_gfx_resume()
|
| D | sdma_v3_0.c | 703 OFFSET, ring->doorbell_index); in sdma_v3_0_gfx_resume()
|
| /drivers/hwmon/ |
| D | adt7475.c | 33 #define OFFSET 3 macro
406 case OFFSET: in show_temp()
457 case OFFSET: in set_temp()
460 out = data->temp[OFFSET][sattr->index] = val / 1000; in set_temp()
463 out = data->temp[OFFSET][sattr->index] = val / 500; in set_temp()
510 case OFFSET: in set_temp()
1090 set_temp, OFFSET, 0);
1108 set_temp, OFFSET, 1);
1127 set_temp, OFFSET, 2);
1754 data->temp[OFFSET][i] = in adt7475_update_device()
|
| /drivers/media/dvb-frontends/ |
| D | bcm3510_priv.h | 189 u8 OFFSET :1; member
214 u8 OFFSET :1; member
|
| D | bcm3510.c | 545 cmd.ACQUIRE0.OFFSET = 0; in bcm3510_set_frontend()
|
| /drivers/media/platform/davinci/ |
| D | dm355_ccdc_regs.h | 47 #define OFFSET 0x6c macro
|
| D | dm355_ccdc.c | 154 regw(ccdc_cfg.bayer.ccdc_offset, OFFSET); in ccdc_config_gain_offset()
|
| /drivers/net/ethernet/amd/xgbe/ |
| D | xgbe-pci.c | 289 pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET); in xgbe_pci_probe()
|
| /drivers/infiniband/hw/hfi1/ |
| D | user_sdma.c | 496 req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) * in hfi1_user_sdma_process_request()
1102 tidoff = KDETH_GET(kval, OFFSET) * in check_header_template()
1242 KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET, in set_txreq_header()
|
| D | file_ops.c | 171 HFI1_MMAP_TOKEN_SET(OFFSET, (offset_in_page(addr))))
|
| /drivers/net/ethernet/qlogic/qed/ |
| D | qed_debug.c | 332 #define FIELD_BIT_OFFSET(type, field) type ## _ ## field ## _ ## OFFSET
|