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Searched refs:PHYRegDef (Results 1 – 13 of 13) sorted by relevance

/drivers/staging/rtl8192u/
Dr819xU_phy.c138 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath]; in rtl8192_phy_RFSerialRead()
223 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath]; in rtl8192_phy_RFSerialWrite()
566 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
568 priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
570 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
572 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
576 priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
578 priv->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
580 priv->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
582 priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB; in rtl8192_InitBBRFRegDef()
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Dr8190_rtl8256.c122 pPhyReg = &priv->PHYRegDef[eRFPath]; in phy_RF8256_Config_ParaFile()
Dr8192U.h975 BB_REGISTER_DEFINITION_T PHYRegDef[4]; /* Radio A/B/C/D */ member
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phy.c107 struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; in _rtl92e_phy_rf_read()
164 struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; in _rtl92e_phy_rf_write()
394 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
395 priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
396 priv->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
397 priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
399 priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; in _rtl92e_init_bb_rf_reg_def()
400 priv->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB; in _rtl92e_init_bb_rf_reg_def()
401 priv->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB; in _rtl92e_init_bb_rf_reg_def()
402 priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB; in _rtl92e_init_bb_rf_reg_def()
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Dr8190P_rtl8256.c83 pPhyReg = &priv->PHYRegDef[eRFPath]; in rtl92e_config_rf()
Drtl_core.h353 struct bb_reg_definition PHYRegDef[4]; member
/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c141 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialRead_8723B()
247 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialWrite_8723B()
413 …pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit … in phy_InitBBRFRegisterDefinition()
414 …pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit … in phy_InitBBRFRegisterDefinition()
417 …pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit f… in phy_InitBBRFRegisterDefinition()
418 …pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit f… in phy_InitBBRFRegisterDefinition()
421 …pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit f… in phy_InitBBRFRegisterDefinition()
422 …pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit f… in phy_InitBBRFRegisterDefinition()
424 pHalData->PHYRegDef[ODM_RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ in phy_InitBBRFRegisterDefinition()
425 pHalData->PHYRegDef[ODM_RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in phy_InitBBRFRegisterDefinition()
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Drtl8723b_rf6052.c115 pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RF6052_Config_ParaFile()
/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c589 reg[RF_PATH_A] = &adapter->HalData->PHYRegDef[RF_PATH_A]; in rtl88e_phy_init_bb_rf_register_definition()
590 reg[RF_PATH_B] = &adapter->HalData->PHYRegDef[RF_PATH_B]; in rtl88e_phy_init_bb_rf_register_definition()
Drf_cfg.c236 pphyreg = &hal_data->PHYRegDef[RF90_PATH_A]; in rf6052_conf_para()
Dphy.c67 struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath]; in rf_serial_read()
111 struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath]; in rf_serial_write()
/drivers/staging/rtl8188eu/include/
Drtl8188e_hal.h267 struct bb_reg_def PHYRegDef[4]; /* Radio A/B/C/D */ member
/drivers/staging/rtl8723bs/include/
Dhal_data.h365 struct bb_register_def PHYRegDef[4]; /* Radio A/B/C/D */ member