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Searched refs:PP_ON (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_lid.c43 } while ((pp_status & PP_ON) == 0 && in psb_lid_timer_func()
46 if (REG_READ(PP_STATUS) & PP_ON) { in psb_lid_timer_func()
59 } while ((pp_status & PP_ON) == 0); in psb_lid_timer_func()
Dpsb_intel_lvds.c236 } while ((pp_status & PP_ON) == 0); in psb_intel_lvds_set_power()
247 } while (pp_status & PP_ON); in psb_intel_lvds_set_power()
336 } while ((pp_status & PP_ON) == 0); in psb_intel_lvds_restore()
342 } while (pp_status & PP_ON); in psb_intel_lvds_restore()
Doaktrail_lvds.c60 } while ((pp_status & (PP_ON | PP_READY)) == PP_READY); in oaktrail_lvds_set_power()
71 } while (pp_status & PP_ON); in oaktrail_lvds_set_power()
Dcdv_intel_lvds.c213 } while ((pp_status & PP_ON) == 0); in cdv_intel_lvds_set_power()
224 } while (pp_status & PP_ON); in cdv_intel_lvds_set_power()
Dpsb_intel_reg.h163 # define PP_ON (1 << 31) macro
Dcdv_intel_dp.c417 u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_NONE; in cdv_intel_edp_panel_on()
443 u32 pp, idle_off_mask = PP_ON ; in cdv_intel_edp_panel_off()
/drivers/gpu/drm/i915/
Dintel_lvds.c319 if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, PP_ON, 5000)) in intel_enable_lvds()
333 if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, 0, 1000)) in intel_disable_lvds()
Dintel_dp.c674 return I915_READ(PP_STATUS(pipe)) & PP_ON; in vlv_pipe_has_pp_on()
887 return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0; in edp_have_panel_power()
1948 #define IDLE_ON_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK)
1949 #define IDLE_ON_VALUE (PP_ON | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_ON_I…
1951 #define IDLE_OFF_MASK (PP_ON | PP_SEQUENCE_MASK | 0 | 0)
1954 #define IDLE_CYCLE_MASK (PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK)
Di915_reg.h4407 #define PP_ON (1 << 31) macro
Dintel_display.c8798 I915_STATE_WARN(I915_READ(PP_STATUS(0)) & PP_ON, "Panel power on\n"); in assert_can_disable_lcpll()
/drivers/gpu/drm/i915/gvt/
Dhandlers.c333 vgpu_vreg(vgpu, PCH_PP_STATUS) |= PP_ON; in pch_pp_control_mmio_write()
340 ~(PP_ON | PP_SEQUENCE_POWER_DOWN in pch_pp_control_mmio_write()