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Searched refs:SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_6_0_sh_mask.h301 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0x0000000a macro
Dsmu_7_0_0_sh_mask.h218 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
Dsmu_7_1_1_sh_mask.h208 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
Dsmu_7_0_1_sh_mask.h208 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
Dsmu_7_1_0_sh_mask.h208 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
Dsmu_7_1_2_sh_mask.h208 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro
Dsmu_7_1_3_sh_mask.h234 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa macro