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Searched refs:T3 (Results 1 – 9 of 9) sorted by relevance

/drivers/block/drbd/
Ddrbd_state.h45 #define NS3(T1, S1, T2, S2, T3, S3) \ argument
47 mask.T2 = T2##_MASK; mask.T3 = T3##_MASK; mask; }), \
49 val.T2 = (S2); val.T3 = (S3); val; })
56 #define _NS3(D, T1, S1, T2, S2, T3, S3) \ argument
58 __ns.T2 = (S2); __ns.T3 = (S3); __ns; })
/drivers/scsi/cxgbi/cxgb3i/
DKconfig2 tristate "Chelsio T3 iSCSI support"
11 This driver supports iSCSI offload for the Chelsio T3 devices.
/drivers/infiniband/hw/cxgb3/
DKconfig6 This is an iWARP/RDMA driver for the Chelsio T3 1GbE and
/drivers/net/ethernet/chelsio/
DKconfig48 tristate "Chelsio Communications T3 10Gb Ethernet support"
53 This driver supports Chelsio T3-based gigabit and 10Gb Ethernet
/drivers/iio/pressure/
Dbmp280-core.c102 enum { T1, T2, T3 }; enumerator
222 ((s32)(s16)le16_to_cpu(buf[T3]))) >> 14; in bmp280_compensate_temp()
/drivers/net/wan/
DKconfig63 tristate "LanMedia Corp. SSI/V.35, T1/E1, HSSI, T3 boards"
78 - LMC 5245 board connects directly to a T3 circuit saving the
/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g5.c598 #define T3 79 macro
601 MS_PIN_DECL(T3, GPIOJ7, DDCDAT, DASHT3);
602 FUNC_GROUP_DECL(DDCDAT, T3);
1962 ASPEED_PINCTRL_PIN(T3),
2396 { PIN_CONFIG_BIAS_PULL_DOWN, { R2, T3 }, SCU8C, 25 },
2397 { PIN_CONFIG_BIAS_DISABLE, { R2, T3 }, SCU8C, 25 },
/drivers/net/ethernet/chelsio/cxgb4vf/
Dcxgb4vf_main.c2077 #define T3(fmt, s, v) S3(fmt, s, txq[qs].v) in sge_qstats_show() macro
2078 #define T(s, v) T3("lu", s, v) in sge_qstats_show()
2135 #undef T3 in sge_qstats_show()
/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_debugfs.c2452 #define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v) in sge_qinfo_show() macro
2454 #define TL(s, v) T3("lu", s, v) in sge_qinfo_show()
2546 #undef T3 in sge_qinfo_show()