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Searched refs:TRAP_ENABLE (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsi_dma.c629 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
634 sdma_cntl |= TRAP_ENABLE; in si_dma_set_trap_irq_state()
645 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
650 sdma_cntl |= TRAP_ENABLE; in si_dma_set_trap_irq_state()
Dsdma_v2_4.c1095 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1100 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
1111 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1116 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
Dsdma_v3_0.c1398 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1403 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
1414 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1419 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
Dsid.h1898 # define TRAP_ENABLE (1 << 0) macro
Dsdma_v4_0.c1360 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v4_0_set_trap_irq_state()
/drivers/gpu/drm/radeon/
Devergreen.c4463 tmp = RREG32(CAYMAN_DMA1_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4467 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4514 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4540 dma_cntl |= TRAP_ENABLE; in evergreen_irq_set()
4544 dma_cntl1 = RREG32(CAYMAN_DMA1_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4547 dma_cntl1 |= TRAP_ENABLE; in evergreen_irq_set()
Dsi.c5954 tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5956 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
6070 dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6071 dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6091 dma_cntl |= TRAP_ENABLE; in si_irq_set()
6096 dma_cntl1 |= TRAP_ENABLE; in si_irq_set()
Dnid.h1324 # define TRAP_ENABLE (1 << 0) macro
Dsid.h1834 # define TRAP_ENABLE (1 << 0) macro
Dcik.c6921 tmp = RREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_disable_interrupt_state()
6923 tmp = RREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_disable_interrupt_state()
7105 dma_cntl = RREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_irq_set()
7106 dma_cntl1 = RREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_irq_set()
7150 dma_cntl |= TRAP_ENABLE; in cik_irq_set()
7155 dma_cntl1 |= TRAP_ENABLE; in cik_irq_set()
Dcikd.h1963 # define TRAP_ENABLE (1 << 0) macro
Dr600.c3620 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_disable_interrupt_state()
3802 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_irq_set()
3824 dma_cntl |= TRAP_ENABLE; in r600_irq_set()
Devergreend.h1405 # define TRAP_ENABLE (1 << 0) macro
Dr600d.h632 # define TRAP_ENABLE (1 << 0) macro