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/drivers/net/ethernet/intel/igbvf/
Dregs.h34 #define E1000_EITR(_n) (0x01680 + (0x4 * (_n))) argument
50 #define E1000_RDBAL(_n) ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \ argument
51 (0x0C000 + ((_n) * 0x40)))
52 #define E1000_RDBAH(_n) ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \ argument
53 (0x0C004 + ((_n) * 0x40)))
54 #define E1000_RDLEN(_n) ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \ argument
55 (0x0C008 + ((_n) * 0x40)))
56 #define E1000_SRRCTL(_n) ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \ argument
57 (0x0C00C + ((_n) * 0x40)))
58 #define E1000_RDH(_n) ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \ argument
[all …]
/drivers/net/ethernet/intel/igb/
De1000_regs.h51 #define E1000_EITR(_n) (0x01680 + (0x4 * (_n))) argument
119 #define E1000_SAQF(_n) (0x5980 + 4 * (_n)) argument
120 #define E1000_DAQF(_n) (0x59A0 + 4 * (_n)) argument
121 #define E1000_SPQF(_n) (0x59C0 + 4 * (_n)) argument
122 #define E1000_FTQF(_n) (0x59E0 + 4 * (_n)) argument
127 #define E1000_SYNQF(_n) (0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */ argument
128 #define E1000_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */ argument
130 #define E1000_RQDPC(_n) (0x0C030 + ((_n) * 0x40)) argument
163 #define E1000_RDBAL(_n) ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) \ argument
164 : (0x0C000 + ((_n) * 0x40)))
[all …]
De1000_defines.h1052 #define E1000_VLAPQF_QUEUE_SEL(_n, q_idx) (q_idx << ((_n) * 4)) argument
1053 #define E1000_VLAPQF_P_VALID(_n) (0x1 << (3 + (_n) * 4)) argument
/drivers/net/ethernet/intel/e1000e/
Dregs.h96 #define E1000_RDBAL(_n) ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \ argument
97 (0x0C000 + ((_n) * 0x40)))
98 #define E1000_RDBAH(_n) ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \ argument
99 (0x0C004 + ((_n) * 0x40)))
100 #define E1000_RDLEN(_n) ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \ argument
101 (0x0C008 + ((_n) * 0x40)))
102 #define E1000_RDH(_n) ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \ argument
103 (0x0C010 + ((_n) * 0x40)))
104 #define E1000_RDT(_n) ((_n) < 4 ? (0x02818 + ((_n) * 0x100)) : \ argument
105 (0x0C018 + ((_n) * 0x40)))
[all …]
D82571.h35 #define E1000_EITR_82574(_n) (0x000E8 + (0x4 * (_n))) argument
/drivers/net/ethernet/intel/fm10k/
Dfm10k_type.h136 #define FM10K_MAXHOLDQ(_n) ((_n) + 0x0020) argument
139 #define FM10K_SM_AREA(_n) ((_n) + 0x0028) argument
142 #define FM10K_DGLORTMAP(_n) ((_n) + 0x0030) argument
148 #define FM10K_DGLORTDEC(_n) ((_n) + 0x0038) argument
158 #define FM10K_SWPRI_MAP(_n) ((_n) + 0x0050) argument
160 #define FM10K_RSSRK(_n, _m) (((_n) * 0x10) + (_m) + 0x0800) argument
163 #define FM10K_RETA(_n, _m) (((_n) * 0x20) + (_m) + 0x1000) argument
169 #define FM10K_TC_CREDIT(_n) ((_n) + 0x2000) argument
171 #define FM10K_TC_MAXCREDIT(_n) ((_n) + 0x2040) argument
173 #define FM10K_TC_RATE(_n) ((_n) + 0x2080) argument
[all …]
Dfm10k_mbx.h31 #define FM10K_MBMEM(_n) ((_n) + 0x18000) argument
32 #define FM10K_MBMEM_VF(_n, _m) (((_n) * 0x10) + (_m) + 0x18000) argument
33 #define FM10K_MBMEM_SM(_n) ((_n) + 0x18400) argument
34 #define FM10K_MBMEM_PF(_n) ((_n) + 0x18600) argument
37 #define FM10K_MBX(_n) ((_n) + 0x18800) argument
46 #define FM10K_MBICR(_n) ((_n) + 0x18840) argument
51 #define FM10K_VFMBMEM(_n) ((_n) + 0x00020) argument
219 #define FM10K_MBX_ERR(_n) ((_n) - 512) argument
/drivers/net/wireless/ath/
Dreg.h43 #define AR_KEYTABLE(_n) (AR_KEYTABLE_0 + ((_n)*32)) argument
56 #define AR_KEYTABLE_KEY0(_n) (AR_KEYTABLE(_n) + 0) argument
57 #define AR_KEYTABLE_KEY1(_n) (AR_KEYTABLE(_n) + 4) argument
58 #define AR_KEYTABLE_KEY2(_n) (AR_KEYTABLE(_n) + 8) argument
59 #define AR_KEYTABLE_KEY3(_n) (AR_KEYTABLE(_n) + 12) argument
60 #define AR_KEYTABLE_KEY4(_n) (AR_KEYTABLE(_n) + 16) argument
61 #define AR_KEYTABLE_TYPE(_n) (AR_KEYTABLE(_n) + 20) argument
62 #define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24) argument
63 #define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28) argument
/drivers/scsi/aic94xx/
Daic94xx_dump.c220 #define PRINT_REG_8bit(_ha, _n, _r) asd_printk(STR_8BIT, #_n, _n, \ argument
222 #define PRINT_REG_16bit(_ha, _n, _r) asd_printk(STR_16BIT, #_n, _n, \ argument
224 #define PRINT_REG_32bit(_ha, _n, _r) asd_printk(STR_32BIT, #_n, _n, \ argument
227 #define PRINT_CREG_8bit(_ha, _n) asd_printk(STR_8BIT, #_n, _n, \ argument
228 asd_read_reg_byte(_ha, C##_n))
229 #define PRINT_CREG_16bit(_ha, _n) asd_printk(STR_16BIT, #_n, _n, \ argument
230 asd_read_reg_word(_ha, C##_n))
231 #define PRINT_CREG_32bit(_ha, _n) asd_printk(STR_32BIT, #_n, _n, \ argument
232 asd_read_reg_dword(_ha, C##_n))
238 #define PRINT_MREG_8bit(_ha, _m, _n, _r) asd_printk(MSTR_8BIT, _m, #_n, _n, \ argument
[all …]
/drivers/net/wireless/mediatek/mt7601u/
Dregs.h39 #define MT_EFUSE_DATA(_n) (MT_EFUSE_DATA_BASE + ((_n) << 2)) argument
95 #define MT_INT_RX_DONE(_n) BIT(_n) argument
98 #define MT_INT_TX_DONE(_n) BIT(_n + 4) argument
129 #define MT_WMM_AIFSN_SHIFT(_n) ((_n) * 4) argument
133 #define MT_WMM_CWMIN_SHIFT(_n) ((_n) * 4) argument
137 #define MT_WMM_CWMAX_SHIFT(_n) ((_n) * 4) argument
140 #define MT_WMM_TXOP(_n) (MT_WMM_TXOP_BASE + (((_n) / 2) << 2)) argument
141 #define MT_WMM_TXOP_SHIFT(_n) ((_n & 1) * 16) argument
193 #define MT_BCN_OFFSET(_n) (MT_BCN_OFFSET_BASE + ((_n) << 2)) argument
286 #define MT_WCID_DROP(_n) (MT_WCID_DROP_BASE + ((_n) >> 5) * 4) argument
[all …]
/drivers/net/wireless/ath/ath5k/
Dreg.h833 #define AR5K_DCU_TX_FILTER_0(_n) (AR5K_DCU_TX_FILTER_0_BASE + (_n * 64)) argument
839 #define AR5K_DCU_TX_FILTER_1(_n) (AR5K_DCU_TX_FILTER_1_BASE + (_n * 64)) argument
1758 #define AR5K_MIC_QOS_CTL_OFF(_n) (1 << (_n * 2)) argument
1765 #define AR5K_MIC_QOS_SEL_OFF(_n) (1 << (_n * 4)) argument
1812 #define AR5K_RATE_ACKSIFS(_n) (AR5K_RATE_ACKSIFS_BSE + ((_n) << 2)) argument
1820 #define AR5K_RATE_DUR(_n) (AR5K_RATE_DUR_BASE + ((_n) << 2)) argument
1827 #define AR5K_RATE2DB(_n) (AR5K_RATE2DB_BASE + ((_n) << 2)) argument
1834 #define AR5K_DB2RATE(_n) (AR5K_DB2RATE_BASE + ((_n) << 2)) argument
1847 #define AR5K_PHY(_n) (AR5K_PHY_BASE + ((_n) << 2)) argument
2027 #define AR5K_PHY_NF_SVAL(_n) (((_n) & AR5K_PHY_NF_M) | (1 << 9)) argument
[all …]
Drfbuffer.h178 #define AR5K_RF5111_PWD(_n) { 1, (135 - _n), 3 } argument
296 #define AR5K_RF5112_PWD(_n) { 1, (302 - _n), 3 } argument
402 #define AR5K_RF5112A_PWD(_n) { 1, (306 - _n), 3 } argument
Ddesc.c408 #define _XTX_TRIES(_n) \ in ath5k_hw_setup_mrr_tx_desc() argument
409 if (tx_tries##_n) { \ in ath5k_hw_setup_mrr_tx_desc()
411 AR5K_REG_SM(tx_tries##_n, \ in ath5k_hw_setup_mrr_tx_desc()
412 AR5K_4W_TX_DESC_CTL2_XMIT_TRIES##_n); \ in ath5k_hw_setup_mrr_tx_desc()
414 AR5K_REG_SM(tx_rate##_n, \ in ath5k_hw_setup_mrr_tx_desc()
415 AR5K_4W_TX_DESC_CTL3_XMIT_RATE##_n); \ in ath5k_hw_setup_mrr_tx_desc()
/drivers/gpu/drm/sun4i/
Dsun4i_hdmi_ddc_clk.c33 u8 best_m = 0, best_n = 0, _m, _n; in sun4i_ddc_calc_divider() local
36 for (_n = 0; _n < 8; _n++) { in sun4i_ddc_calc_divider()
39 tmp_rate = (((parent_rate / 2) / 10) >> _n) / (_m + 1); in sun4i_ddc_calc_divider()
47 best_n = _n; in sun4i_ddc_calc_divider()
/drivers/clk/sunxi-ng/
Dccu_nk.c26 unsigned int _k, _n; in ccu_nk_find_best() local
29 for (_n = nk->min_n; _n <= nk->max_n; _n++) { in ccu_nk_find_best()
30 unsigned long tmp_rate = parent * _n * _k; in ccu_nk_find_best()
38 best_n = _n; in ccu_nk_find_best()
Dccu_nm.c27 unsigned long _n, _m; in ccu_nm_find_best() local
29 for (_n = nm->min_n; _n <= nm->max_n; _n++) { in ccu_nm_find_best()
31 unsigned long tmp_rate = parent * _n / _m; in ccu_nm_find_best()
38 best_n = _n; in ccu_nm_find_best()
Dccu_nkmp.c28 unsigned long _n, _k, _m, _p; in ccu_nkmp_find_best() local
31 for (_n = nkmp->min_n; _n <= nkmp->max_n; _n++) { in ccu_nkmp_find_best()
36 tmp_rate = parent * _n * _k / (_m * _p); in ccu_nkmp_find_best()
43 best_n = _n; in ccu_nkmp_find_best()
Dccu_nkm.c27 unsigned long _n, _k, _m; in ccu_nkm_find_best() local
30 for (_n = nkm->min_n; _n <= nkm->max_n; _n++) { in ccu_nkm_find_best()
34 tmp_rate = parent * _n * _k / _m; in ccu_nkm_find_best()
40 best_n = _n; in ccu_nkm_find_best()
/drivers/clk/meson/
Dclkc.h47 #define PLL_RATE(_r, _m, _n, _od) \ argument
51 .n = (_n), \
55 #define PLL_FRAC_RATE(_r, _m, _n, _od, _od2, _frac) \ argument
59 .n = (_n), \
/drivers/net/wireless/intel/iwlwifi/
Diwl-prph.h252 #define SCD_QUEUE_CTX_REG1_VAL(_n, _v) FIELD_PREP(SCD_QUEUE_CTX_REG1_ ## _n, _v) argument
256 #define SCD_QUEUE_CTX_REG2_VAL(_n, _v) FIELD_PREP(SCD_QUEUE_CTX_REG2_ ## _n, _v) argument
/drivers/net/wireless/ath/ath9k/
Dphy.h25 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) argument
/drivers/net/ethernet/brocade/bna/
Dbfa_defs_mfg_comm.h38 #define STRSZ(_n) (((_n) + 4) & ~3) argument
/drivers/regulator/
Dpcf50633-regulator.c27 #define PCF50633_REGULATOR(_name, _id, _min_uV, _uV_step, _min_sel, _n) \ argument
32 .n_voltages = _n, \
Dlp873x-regulator.c22 #define LP873X_REGULATOR(_name, _id, _of, _ops, _n, _vr, _vm, _er, _em, \ argument
32 .n_voltages = _n, \
/drivers/net/ethernet/amd/xgbe/
Dxgbe-common.h1464 #define XGMAC_MTL_IOREAD(_pdata, _n, _reg) \ argument
1466 MTL_Q_BASE + ((_n) * MTL_Q_INC) + _reg)
1468 #define XGMAC_MTL_IOREAD_BITS(_pdata, _n, _reg, _field) \ argument
1469 GET_BITS(XGMAC_MTL_IOREAD((_pdata), (_n), _reg), \
1473 #define XGMAC_MTL_IOWRITE(_pdata, _n, _reg, _val) \ argument
1475 MTL_Q_BASE + ((_n) * MTL_Q_INC) + _reg)
1477 #define XGMAC_MTL_IOWRITE_BITS(_pdata, _n, _reg, _field, _val) \ argument
1479 u32 reg_val = XGMAC_MTL_IOREAD((_pdata), (_n), _reg); \
1483 XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val); \

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