| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | arb.c | 40 int burst; member
107 fifo->burst = cbs; in nv04_calc_arb()
178 fifo->burst = min(max_burst_o, 1024); in nv10_calc_arb()
182 fifo->burst = min(max_burst_l, fifo->burst); in nv10_calc_arb()
184 fifo->burst = rounddown_pow_of_two(fifo->burst); in nv10_calc_arb()
189 max_lwm = fifo_len - fifo->burst in nv10_calc_arb()
191 + fifo->burst * drain_rate / fill_rate; in nv10_calc_arb()
198 int *burst, int *lwm) in nv04_update_arb() argument
235 *burst = ilog2(fifo_data.burst >> 4); in nv04_update_arb()
240 nv20_update_arb(int *burst, int *lwm) in nv20_update_arb() argument
[all …]
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| /drivers/gpu/drm/bridge/ |
| D | sil-sii8620.c | 90 } burst; member
628 u8 *buf = &ctx->burst.tx_buf[ctx->burst.tx_count]; in sii8620_burst_get_tx_buf()
631 if (ctx->burst.tx_count + size > ARRAY_SIZE(ctx->burst.tx_buf)) { in sii8620_burst_get_tx_buf()
637 ctx->burst.tx_count += size; in sii8620_burst_get_tx_buf()
645 u8 *buf = &ctx->burst.rx_buf[ctx->burst.rx_count]; in sii8620_burst_get_rx_buf()
648 if (ctx->burst.tx_count + size > ARRAY_SIZE(ctx->burst.tx_buf)) { in sii8620_burst_get_rx_buf()
654 ctx->burst.rx_count += size; in sii8620_burst_get_rx_buf()
662 int tx_left = ctx->burst.tx_count; in sii8620_burst_send()
663 u8 *d = ctx->burst.tx_buf; in sii8620_burst_send()
668 if (ctx->burst.r_count + len > ctx->burst.r_size) in sii8620_burst_send()
[all …]
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| /drivers/media/pci/ttpci/ |
| D | budget-patch.c | 98 static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst) in SendDiSEqCMsg() argument
113 if (burst!=-1) { in SendDiSEqCMsg()
114 if (burst) in SendDiSEqCMsg()
198 static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst) in av7110_send_diseqc_msg() argument
212 if (burst != -1) in av7110_send_diseqc_msg()
213 buf[3]=burst ? 0x01 : 0x00; in av7110_send_diseqc_msg()
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| /drivers/gpu/drm/i915/ |
| D | intel_tv.c | 55 u8 burst; member
193 .blank = 225, .black = 267, .burst = 113,
203 .blank = 266, .black = 316, .burst = 133,
213 .blank = 225, .black = 225, .burst = 113,
223 .blank = 266, .black = 266, .burst = 133,
233 .blank = 237, .black = 237, .burst = 118,
243 .blank = 280, .black = 280, .burst = 139,
253 .blank = 225, .black = 267, .burst = 113,
263 .blank = 266, .black = 316, .burst = 133,
273 .blank = 225, .black = 267, .burst = 118,
[all …]
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| /drivers/media/dvb-frontends/ |
| D | tda8083.c | 213 enum fe_sec_mini_cmd burst) in tda8083_send_diseqc_burst() argument
215 switch (burst) { in tda8083_send_diseqc_burst()
383 enum fe_sec_mini_cmd burst) in tda8083_diseqc_send_burst() argument
387 tda8083_send_diseqc_burst (state, burst); in tda8083_diseqc_send_burst()
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| D | cx24110.c | 385 enum fe_sec_mini_cmd burst) in cx24110_diseqc_send_burst() argument
391 if (burst == SEC_MINI_A) in cx24110_diseqc_send_burst()
393 else if (burst == SEC_MINI_B) in cx24110_diseqc_send_burst()
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| D | gp8psk-fe.c | 256 enum fe_sec_mini_cmd burst) in gp8psk_fe_send_diseqc_burst() argument
264 cmd = (burst == SEC_MINI_A) ? 0x00 : 0x01; in gp8psk_fe_send_diseqc_burst()
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| D | cx24116.c | 195 u8 burst; member
1060 enum fe_sec_mini_cmd burst) in cx24116_diseqc_send_burst() argument
1065 dprintk("%s(%d) toneburst=%d\n", __func__, burst, toneburst); in cx24116_diseqc_send_burst()
1068 if (burst == SEC_MINI_A) in cx24116_diseqc_send_burst()
1071 else if (burst == SEC_MINI_B) in cx24116_diseqc_send_burst()
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| D | stv0288.c | 177 enum fe_sec_mini_cmd burst) in stv0288_send_diseqc_burst() argument
186 if (stv0288_writeregI(state, 0x06, burst == SEC_MINI_A ? 0x00 : 0xff)) in stv0288_send_diseqc_burst()
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| /drivers/mmc/host/ |
| D | omap.c | 988 u32 burst, *bp; in mmc_omap_prepare_data() local
997 burst = mmc_omap15xx() ? 32 : 64; in mmc_omap_prepare_data()
998 if (burst > data->blksz) in mmc_omap_prepare_data()
999 burst = data->blksz; in mmc_omap_prepare_data()
1001 burst >>= 1; in mmc_omap_prepare_data()
1006 buf = 0x0f80 | (burst - 1) << 0; in mmc_omap_prepare_data()
1011 buf = 0x800f | (burst - 1) << 8; in mmc_omap_prepare_data()
1019 if (*bp != burst) { in mmc_omap_prepare_data()
1027 .src_maxburst = burst, in mmc_omap_prepare_data()
1028 .dst_maxburst = burst, in mmc_omap_prepare_data()
[all …]
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| /drivers/video/fbdev/nvidia/ |
| D | nv_hw.c | 382 unsigned *burst, in nv4UpdateArbitrationSettings() argument
408 *burst = 0; in nv4UpdateArbitrationSettings()
410 (*burst)++; in nv4UpdateArbitrationSettings()
620 unsigned *burst, in nv10UpdateArbitrationSettings() argument
648 *burst = 0; in nv10UpdateArbitrationSettings()
650 (*burst)++; in nv10UpdateArbitrationSettings()
657 unsigned int *burst, in nv30UpdateArbitrationSettings() argument
670 *burst = 0; in nv30UpdateArbitrationSettings()
672 while(burst_size >>= 1) (*burst)++; in nv30UpdateArbitrationSettings()
678 unsigned *burst, in nForceUpdateArbitrationSettings() argument
[all …]
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| /drivers/media/pci/cx18/ |
| D | cx18-av-core.c | 294 int hblank, hactive, burst, vblank, vactive, sc; in cx18_av_std_setup() local
366 burst = 93; in cx18_av_std_setup()
429 burst = 90; in cx18_av_std_setup()
436 burst = 97; in cx18_av_std_setup()
441 burst = 90; in cx18_av_std_setup()
480 src_decimation, burst, luma_lpf, uv_lpf, in cx18_av_std_setup()
491 cx18_av_write(cx, 0x473, burst); in cx18_av_std_setup()
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| /drivers/usb/mtu3/ |
| D | mtu3_gadget.c | 80 u32 burst = 0; in mtu3_ep_enable() local
100 burst = comp_desc->bMaxBurst; in mtu3_ep_enable()
108 burst = (max_packet & GENMASK(12, 11)) >> 11; in mtu3_ep_enable()
116 __func__, mep->maxp, interval, burst, mult); in mtu3_ep_enable()
125 ret = mtu3_config_ep(mtu, mep, interval, burst, mult); in mtu3_ep_enable()
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| D | mtu3_core.c | 289 int interval, int burst, int mult) in mtu3_config_ep() argument
310 num_pkts = (burst + 1) * (mult + 1) - 1; in mtu3_config_ep()
311 csr1 = TX_SS_BURST(burst) | TX_SLOT(mep->slot); in mtu3_config_ep()
346 num_pkts = (burst + 1) * (mult + 1) - 1; in mtu3_config_ep()
347 csr1 = RX_SS_BURST(burst) | RX_SLOT(mep->slot); in mtu3_config_ep()
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| /drivers/dma/ |
| D | edma.c | 930 dma_addr_t src_addr, dma_addr_t dst_addr, u32 burst, in edma_config_pset() argument
942 if (!burst) in edma_config_pset()
943 burst = 1; in edma_config_pset()
949 if (burst == 1) { in edma_config_pset()
985 bcnt = burst; in edma_config_pset()
1051 u32 burst; in edma_prep_slave_sg() local
1061 burst = echan->cfg.src_maxburst; in edma_prep_slave_sg()
1065 burst = echan->cfg.dst_maxburst; in edma_prep_slave_sg()
1111 dst_addr, burst, dev_width, in edma_prep_slave_sg()
1260 u32 burst; in edma_prep_dma_cyclic() local
[all …]
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| D | omap-dma.c | 886 u32 burst; in omap_dma_prep_slave_sg() local
892 burst = c->cfg.src_maxburst; in omap_dma_prep_slave_sg()
897 burst = c->cfg.dst_maxburst; in omap_dma_prep_slave_sg()
930 burst = port_window; in omap_dma_prep_slave_sg()
1010 en = burst; in omap_dma_prep_slave_sg()
1066 u32 burst; in omap_dma_prep_dma_cyclic() local
1071 burst = c->cfg.src_maxburst; in omap_dma_prep_dma_cyclic()
1075 burst = c->cfg.dst_maxburst; in omap_dma_prep_dma_cyclic()
1103 d->fi = burst; in omap_dma_prep_dma_cyclic()
1130 if (burst) in omap_dma_prep_dma_cyclic()
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| D | pxa_dma.c | 208 int burst = (dcmd >> 16) & 0x3; in dbg_burst_from_dcmd() local
210 return burst ? 4 << burst : 0; in dbg_burst_from_dcmd()
224 int i, max_show = 20, burst, width; in dbg_show_descriptors() local
236 burst = dbg_burst_from_dcmd(dcmd); in dbg_show_descriptors()
249 PXA_DCMD_STR(ENDIAN), burst, width, in dbg_show_descriptors()
268 int burst, width; in dbg_show_chan_state() local
275 burst = dbg_burst_from_dcmd(dcmd); in dbg_show_chan_state()
299 PXA_DCMD_STR(ENDIAN), burst, width, dcmd & PXA_DCMD_LENGTH); in dbg_show_chan_state()
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| D | nbpfaxi.c | 460 enum dma_slave_buswidth width, u32 burst) in nbpf_xfer_size() argument
464 if (!burst) in nbpf_xfer_size()
465 burst = 1; in nbpf_xfer_size()
469 size = 8 * burst; in nbpf_xfer_size()
473 size = 4 * burst; in nbpf_xfer_size()
477 size = 2 * burst; in nbpf_xfer_size()
483 size = burst; in nbpf_xfer_size()
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| D | fsl-edma.c | 147 u32 burst; member
354 fsl_chan->fsc.burst = cfg->src_maxburst; in fsl_edma_slave_config()
359 fsl_chan->fsc.burst = cfg->dst_maxburst; in fsl_edma_slave_config()
563 nbytes = fsl_chan->fsc.addr_width * fsl_chan->fsc.burst; in fsl_edma_prep_dma_cyclic()
614 nbytes = fsl_chan->fsc.addr_width * fsl_chan->fsc.burst; in fsl_edma_prep_slave_sg()
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| /drivers/video/fbdev/matrox/ |
| D | matroxfb_g450.c | 232 unsigned int burst; member
307 r->regs[0x09] = (outd->burst + pixclock - 1) / pixclock; /* burst length */ in computeRegs()
367 .burst = 2518518, // ps in cve2_init_TVdata()
376 .burst = 2418418, // ps in cve2_init_TVdata()
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| /drivers/video/fbdev/riva/ |
| D | riva_hw.c | 612 unsigned *burst, in nv3UpdateArbitrationSettings() argument
642 *burst = 0; in nv3UpdateArbitrationSettings()
644 (*burst)++; in nv3UpdateArbitrationSettings()
650 *burst = 0x2; in nv3UpdateArbitrationSettings()
801 unsigned *burst, in nv4UpdateArbitrationSettings() argument
833 *burst = 0; in nv4UpdateArbitrationSettings()
835 (*burst)++; in nv4UpdateArbitrationSettings()
1064 unsigned *burst, in nv10UpdateArbitrationSettings() argument
1098 *burst = 0; in nv10UpdateArbitrationSettings()
1100 (*burst)++; in nv10UpdateArbitrationSettings()
[all …]
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| /drivers/gpu/drm/via/ |
| D | via_verifier.c | 722 int burst = 0; in via_parse_header2() local
735 (burst & 63), *buf++); in via_parse_header2()
736 burst += 4; in via_parse_header2()
756 (burst & 63), *buf++); in via_parse_header2()
757 burst += 4; in via_parse_header2()
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| /drivers/ata/ |
| D | pata_pdc202xx_old.c | 269 u8 burst = ioread8(bmdma + 0x1f); in pdc2026x_port_start() local
270 iowrite8(burst | 0x01, bmdma + 0x1f); in pdc2026x_port_start()
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| /drivers/media/common/b2c2/ |
| D | flexcop-fe-tuner.c | 129 int len, u8 *msg, unsigned long burst) in flexcop_send_diseqc_msg() argument
140 if (burst != -1) { in flexcop_send_diseqc_msg()
141 if (burst) in flexcop_send_diseqc_msg()
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| /drivers/atm/ |
| D | Kconfig | 65 bool "Fine-tune burst settings"
70 transfer is called a burst.
72 The default settings for the burst sizes are suitable for most PCI
76 The burst sizes can be set independently in the send (TX) and
79 Note that enabling many different burst sizes in the same direction
82 available burst size.
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