Searched refs:clk_csr (Results 1 – 8 of 8) sorted by relevance
65 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_mdio_read()108 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_mdio_write()
124 int clk_csr; member
224 if (!(priv->clk_csr & MAC_CSR_H_FRQ_MASK)) { in stmmac_clk_csr_set()226 priv->clk_csr = STMMAC_CSR_20_35M; in stmmac_clk_csr_set()228 priv->clk_csr = STMMAC_CSR_35_60M; in stmmac_clk_csr_set()230 priv->clk_csr = STMMAC_CSR_60_100M; in stmmac_clk_csr_set()232 priv->clk_csr = STMMAC_CSR_100_150M; in stmmac_clk_csr_set()234 priv->clk_csr = STMMAC_CSR_150_250M; in stmmac_clk_csr_set()236 priv->clk_csr = STMMAC_CSR_250_300M; in stmmac_clk_csr_set()241 priv->clk_csr = 0x03; in stmmac_clk_csr_set()243 priv->clk_csr = 0x02; in stmmac_clk_csr_set()245 priv->clk_csr = 0x01; in stmmac_clk_csr_set()[all …]
72 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ in common_default_data()
180 priv->clk_csr = SXGBE_CSR_100_150M; in sxgbe_clk_csr_set()182 priv->clk_csr = SXGBE_CSR_150_250M; in sxgbe_clk_csr_set()184 priv->clk_csr = SXGBE_CSR_250_300M; in sxgbe_clk_csr_set()186 priv->clk_csr = SXGBE_CSR_300_350M; in sxgbe_clk_csr_set()188 priv->clk_csr = SXGBE_CSR_350_400M; in sxgbe_clk_csr_set()190 priv->clk_csr = SXGBE_CSR_400_500M; in sxgbe_clk_csr_set()2160 if (!priv->plat->clk_csr) in sxgbe_drv_probe()2163 priv->clk_csr = priv->plat->clk_csr; in sxgbe_drv_probe()
51 ((sp->clk_csr & 0x7) << 19) | SXGBE_MII_BUSY; in sxgbe_mdio_ctrl_data()
492 int clk_csr; member
486 unsigned int clk_csr; in qat_hal_clr_reset() local502 clk_csr = GET_GLB_CSR(handle, ICP_GLOBAL_CLK_ENABLE); in qat_hal_clr_reset()503 clk_csr |= handle->hal_handle->ae_mask << 0; in qat_hal_clr_reset()504 clk_csr |= handle->hal_handle->slice_mask << 20; in qat_hal_clr_reset()505 SET_GLB_CSR(handle, ICP_GLOBAL_CLK_ENABLE, clk_csr); in qat_hal_clr_reset()