| /drivers/cpufreq/ |
| D | s3c2412-cpufreq.c | 120 unsigned long clkdiv; in s3c2412_cpufreq_setdivs() local
123 olddiv = clkdiv = __raw_readl(S3C2410_CLKDIVN); in s3c2412_cpufreq_setdivs()
127 clkdiv &= ~S3C2412_CLKDIVN_ARMDIVN; in s3c2412_cpufreq_setdivs()
128 clkdiv &= ~S3C2412_CLKDIVN_HDIVN_MASK; in s3c2412_cpufreq_setdivs()
129 clkdiv &= ~S3C2412_CLKDIVN_PDIVN; in s3c2412_cpufreq_setdivs()
132 clkdiv |= S3C2412_CLKDIVN_ARMDIVN; in s3c2412_cpufreq_setdivs()
134 clkdiv |= ((cfg->divs.h_divisor / cfg->divs.arm_divisor) - 1); in s3c2412_cpufreq_setdivs()
137 clkdiv |= S3C2412_CLKDIVN_PDIVN; in s3c2412_cpufreq_setdivs()
139 s3c_freq_dbg("%s: div %08lx => %08lx\n", __func__, olddiv, clkdiv); in s3c2412_cpufreq_setdivs()
140 __raw_writel(clkdiv, S3C2410_CLKDIVN); in s3c2412_cpufreq_setdivs()
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| D | s3c2440-cpufreq.c | 144 unsigned long clkdiv, camdiv; in s3c2440_cpufreq_setdivs() local
149 clkdiv = __raw_readl(S3C2410_CLKDIVN); in s3c2440_cpufreq_setdivs()
152 clkdiv &= ~(S3C2440_CLKDIVN_HDIVN_MASK | S3C2440_CLKDIVN_PDIVN); in s3c2440_cpufreq_setdivs()
157 clkdiv |= S3C2440_CLKDIVN_HDIVN_1; in s3c2440_cpufreq_setdivs()
161 clkdiv |= S3C2440_CLKDIVN_HDIVN_2; in s3c2440_cpufreq_setdivs()
167 clkdiv |= S3C2440_CLKDIVN_HDIVN_3_6; in s3c2440_cpufreq_setdivs()
173 clkdiv |= S3C2440_CLKDIVN_HDIVN_4_8; in s3c2440_cpufreq_setdivs()
181 clkdiv |= S3C2440_CLKDIVN_PDIVN; in s3c2440_cpufreq_setdivs()
191 __raw_writel(clkdiv, S3C2410_CLKDIVN); in s3c2440_cpufreq_setdivs()
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| D | s3c2410-cpufreq.c | 35 u32 clkdiv = 0; in s3c2410_cpufreq_setdivs() local
38 clkdiv |= S3C2410_CLKDIVN_HDIVN; in s3c2410_cpufreq_setdivs()
41 clkdiv |= S3C2410_CLKDIVN_PDIVN; in s3c2410_cpufreq_setdivs()
43 __raw_writel(clkdiv, S3C2410_CLKDIVN); in s3c2410_cpufreq_setdivs()
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| /drivers/spi/ |
| D | spi-cavium.h | 46 uint64_t clkdiv:13; member
78 uint64_t clkdiv:13;
85 uint64_t clkdiv:13; member
111 uint64_t clkdiv:13;
118 uint64_t clkdiv:13; member
142 uint64_t clkdiv:13;
150 uint64_t clkdiv:13; member
180 uint64_t clkdiv:13;
187 uint64_t clkdiv:13; member
217 uint64_t clkdiv:13;
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| D | spi-cavium.c | 36 unsigned int clkdiv; in octeon_spi_do_transfer() local
48 clkdiv = p->sys_freq / (2 * xfer->speed_hz); in octeon_spi_do_transfer()
52 mpi_cfg.s.clkdiv = clkdiv; in octeon_spi_do_transfer()
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| D | spi-efm32.c | 124 u32 clkdiv; in efm32_spi_setup_transfer() local
134 clkdiv = 0; in efm32_spi_setup_transfer()
136 clkdiv = 64 * (DIV_ROUND_UP(2 * clkfreq, speed) - 4); in efm32_spi_setup_transfer()
138 if (clkdiv > (1U << 21)) in efm32_spi_setup_transfer()
141 efm32_spi_write32(ddata, clkdiv, REG_CLKDIV); in efm32_spi_setup_transfer()
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| /drivers/hwtracing/intel_th/ |
| D | pti.c | 35 unsigned int clkdiv; member
121 return scnprintf(buf, PAGE_SIZE, "%d\n", 1u << pti->clkdiv); in clock_divider_show()
139 pti->clkdiv = val; in clock_divider_store()
167 ctl |= pti->clkdiv << __ffs(PTI_CLKDIV); in intel_th_pti_activate()
191 pti->clkdiv = (ctl & PTI_CLKDIV) >> __ffs(PTI_CLKDIV); in read_hw_config()
196 if (!pti->clkdiv) in read_hw_config()
197 pti->clkdiv = 1; in read_hw_config()
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| /drivers/w1/masters/ |
| D | mxc_w1.c | 103 unsigned int clkdiv; in mxc_w1_probe() local
124 clkdiv = DIV_ROUND_CLOSEST(clkrate, 1000000); in mxc_w1_probe()
125 clkrate /= clkdiv; in mxc_w1_probe()
141 writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER); in mxc_w1_probe()
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| /drivers/pwm/ |
| D | pwm-mediatek.c | 121 u32 resolution, clkdiv = 0; in mtk_pwm_config() local
132 clkdiv++; in mtk_pwm_config()
135 if (clkdiv > PWM_CLK_DIV_MAX) { in mtk_pwm_config()
141 mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); in mtk_pwm_config()
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| D | pwm-tiehrpwm.c | 166 unsigned int clkdiv, hspclkdiv; in set_prescale_div() local
168 for (clkdiv = 0; clkdiv <= CLKDIV_MAX; clkdiv++) { in set_prescale_div()
181 *prescale_div = (1 << clkdiv) * in set_prescale_div()
184 *tb_clk_div = (clkdiv << TBCTL_CLKDIV_SHIFT) | in set_prescale_div()
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| /drivers/gpu/drm/exynos/ |
| D | exynos7_drm_decon.c | 149 u32 clkdiv; in decon_calc_clkdiv() local
152 clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->vclk), ideal_clk); in decon_calc_clkdiv()
154 return (clkdiv < 0x100) ? clkdiv : 0xff; in decon_calc_clkdiv()
161 u32 val, clkdiv; in decon_commit() local
210 clkdiv = decon_calc_clkdiv(ctx, mode); in decon_commit()
211 if (clkdiv > 1) { in decon_commit()
212 val = VCLKCON1_CLKVAL_NUM_VCLK(clkdiv - 1); in decon_commit()
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| D | exynos_drm_fimd.c | 186 u32 clkdiv; member
378 u32 clkdiv; in fimd_atomic_check() local
403 clkdiv = DIV_ROUND_CLOSEST(lcd_rate, ideal_clk); in fimd_atomic_check()
404 if (clkdiv >= 0x200) { in fimd_atomic_check()
409 ctx->clkdiv = (clkdiv < 0x100) ? clkdiv : 0xff; in fimd_atomic_check()
541 if (ctx->clkdiv > 1) in fimd_commit()
542 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR; in fimd_commit()
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| /drivers/iio/adc/ |
| D | lpc18xx_adc.c | 127 unsigned int clkdiv; in lpc18xx_adc_probe() local
152 clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET); in lpc18xx_adc_probe()
179 adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) | in lpc18xx_adc_probe()
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| /drivers/i2c/busses/ |
| D | i2c-efm32.c | 317 u32 clkdiv; in efm32_i2c_probe() local
406 clkdiv = DIV_ROUND_UP(rate, 8 * ddata->frequency) - 1; in efm32_i2c_probe()
407 if (clkdiv >= 0x200) { in efm32_i2c_probe()
416 rate, ddata->frequency, (unsigned long)clkdiv); in efm32_i2c_probe()
417 efm32_i2c_write32(ddata, REG_CLKDIV, REG_CLKDIV_DIV(clkdiv)); in efm32_i2c_probe()
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| D | i2c-ibm_iic.h | 38 u8 clkdiv; member
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| /drivers/tty/serial/ |
| D | efm32-uart.c | 352 u32 clkdiv; in efm32_uart_set_termios() local
395 clkdiv = (DIV_ROUND_CLOSEST(4 * port->uartclk, 16 * baud) - 4) << 6; in efm32_uart_set_termios()
420 efm32_uart_write32(efm_port, clkdiv, UARTn_CLKDIV); in efm32_uart_set_termios()
559 u32 route, clkdiv, frame; in efm32_uart_console_get_options() local
570 clkdiv = efm32_uart_read32(efm_port, UARTn_CLKDIV); in efm32_uart_console_get_options()
573 16 * (4 + (clkdiv >> 6))); in efm32_uart_console_get_options()
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| /drivers/video/fbdev/ |
| D | s3c2410fb.c | 379 int clkdiv; in s3c2410fb_activate_var() local
381 clkdiv = DIV_ROUND_UP(s3c2410fb_calc_pixclk(fbi, var->pixclock), 2); in s3c2410fb_activate_var()
389 --clkdiv; in s3c2410fb_activate_var()
390 if (clkdiv < 0) in s3c2410fb_activate_var()
391 clkdiv = 0; in s3c2410fb_activate_var()
394 if (clkdiv < 2) in s3c2410fb_activate_var()
395 clkdiv = 2; in s3c2410fb_activate_var()
398 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_CLKVAL(clkdiv); in s3c2410fb_activate_var()
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| D | nuc900fb.c | 229 int clkdiv; in nuc900fb_activate_var() local
231 clkdiv = nuc900fb_calc_pixclk(fbi, var->pixclock) - 1; in nuc900fb_activate_var()
232 if (clkdiv < 0) in nuc900fb_activate_var()
233 clkdiv = 0; in nuc900fb_activate_var()
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| /drivers/gpu/drm/tilcdc/ |
| D | tilcdc_crtc.c | 239 unsigned int clkdiv; in tilcdc_crtc_set_clk() local
242 clkdiv = 2; /* first try using a standard divider of 2 */ in tilcdc_crtc_set_clk()
247 ret = clk_set_rate(priv->clk, req_rate * clkdiv); in tilcdc_crtc_set_clk()
264 clkdiv = DIV_ROUND_CLOSEST(clk_rate, req_rate); in tilcdc_crtc_set_clk()
273 real_rate = clkdiv * req_rate; in tilcdc_crtc_set_clk()
285 tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv); in tilcdc_crtc_set_clk()
288 tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) | in tilcdc_crtc_set_clk()
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| /drivers/gpu/drm/gma500/ |
| D | tc35876x-dsi-lvds.c | 445 u16 clkdiv; in tc35876x_brightness_init() local
462 clkdiv = calc_clkdiv(SYSTEMCLK, PWM_FREQUENCY); in tc35876x_brightness_init()
464 ret = intel_scu_ipc_iowrite8(PWM0CLKDIV1, (clkdiv >> 8) & 0xff); in tc35876x_brightness_init()
466 ret = intel_scu_ipc_iowrite8(PWM0CLKDIV0, clkdiv & 0xff); in tc35876x_brightness_init()
472 clkdiv, PWM_FREQUENCY); in tc35876x_brightness_init()
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| /drivers/mmc/host/ |
| D | sh_mmcif.c | 491 unsigned int clkdiv; in sh_mmcif_clock_control() local
503 clkdiv = 0; in sh_mmcif_clock_control()
522 clkdiv = i; in sh_mmcif_clock_control()
528 (best_freq / (1 << (clkdiv + 1))), clk, in sh_mmcif_clock_control()
529 best_freq, clkdiv); in sh_mmcif_clock_control()
532 clkdiv = clkdiv << 16; in sh_mmcif_clock_control()
534 clkdiv = CLK_SUP_PCLK; in sh_mmcif_clock_control()
536 clkdiv = (fls(DIV_ROUND_UP(current_clk, clk) - 1) - 1) << 16; in sh_mmcif_clock_control()
539 sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & clkdiv); in sh_mmcif_clock_control()
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| D | atmel-mci.c | 1438 int clkdiv; in atmci_set_ios() local
1461 clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2; in atmci_set_ios()
1462 if (clkdiv < 0) { in atmci_set_ios()
1466 clkdiv = 0; in atmci_set_ios()
1467 } else if (clkdiv > 511) { in atmci_set_ios()
1471 clkdiv = 511; in atmci_set_ios()
1473 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) in atmci_set_ios()
1474 | ATMCI_MR_CLKODD(clkdiv & 1); in atmci_set_ios()
1476 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1; in atmci_set_ios()
1477 if (clkdiv > 255) { in atmci_set_ios()
[all …]
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| /drivers/media/dvb-frontends/ |
| D | stv6111.c | 375 u32 clkdiv = 0; in init_state() local
395 if (clkdiv <= 3) in init_state()
396 state->reg[0x00] |= (clkdiv & 0x03); in init_state()
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| D | cx24120.c | 131 u8 clkdiv; member
1121 state->dnxt.clkdiv = (-(rate < 31000001) & 3) + 2; in cx24120_set_symbolrate()
1124 state->dnxt.clkdiv = 3; in cx24120_set_symbolrate()
1196 state->dcur.clkdiv, state->dcur.ratediv); in cx24120_set_frontend()
1223 cmd.arg[13] = state->dcur.clkdiv; in cx24120_set_frontend()
1232 ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv); in cx24120_set_frontend()
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| /drivers/net/ethernet/ |
| D | ethoc.c | 1188 u32 clkdiv = MIIMODER_CLKDIV(eth_clkfreq / 2500000 + 1); in ethoc_probe() local
1190 if (!clkdiv) in ethoc_probe()
1191 clkdiv = 2; in ethoc_probe()
1192 dev_dbg(&pdev->dev, "setting MII clkdiv to %u\n", clkdiv); in ethoc_probe()
1195 clkdiv); in ethoc_probe()
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