/drivers/gpu/drm/exynos/ |
D | exynos_drm_plane.c | 67 int crtc_x, crtc_y; in exynos_plane_mode_set() local 80 crtc_x = state->crtc_x; in exynos_plane_mode_set() 95 actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay); in exynos_plane_mode_set() 98 if (crtc_x < 0) { in exynos_plane_mode_set() 100 src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16; in exynos_plane_mode_set() 101 crtc_x = 0; in exynos_plane_mode_set() 117 exynos_state->crtc.x = crtc_x; in exynos_plane_mode_set()
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/drivers/gpu/drm/vc4/ |
D | vc4_plane.c | 57 int crtc_x, crtc_y, crtc_w, crtc_h; member 322 vc4_state->crtc_x = state->crtc_x; in vc4_plane_setup_clipping_and_scaling() 374 if (vc4_state->crtc_x < 0) { in vc4_plane_setup_clipping_and_scaling() 380 (-vc4_state->crtc_x) / subs); in vc4_plane_setup_clipping_and_scaling() 382 vc4_state->src_w[0] += vc4_state->crtc_x; in vc4_plane_setup_clipping_and_scaling() 383 vc4_state->src_w[1] += vc4_state->crtc_x / h_subsample; in vc4_plane_setup_clipping_and_scaling() 384 vc4_state->crtc_x = 0; in vc4_plane_setup_clipping_and_scaling() 580 VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) | in vc4_plane_mode_set() 751 WARN_ON_ONCE(plane->state->crtc_x < 0 || plane->state->crtc_y < 0); in vc4_plane_async_set_fb() 802 int crtc_x, int crtc_y, in vc4_update_plane() argument [all …]
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/drivers/gpu/drm/ |
D | drm_plane_helper.c | 241 .crtc_x = dst->x1, in drm_plane_helper_check_update() 304 int crtc_x, int crtc_y, in drm_primary_helper_update() argument 324 .x1 = crtc_x, in drm_primary_helper_update() 326 .x2 = crtc_x + crtc_w, in drm_primary_helper_update() 547 int crtc_x, int crtc_y, in drm_plane_helper_update() argument 568 plane_state->crtc_x = crtc_x; in drm_plane_helper_update()
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D | drm_plane.c | 585 int32_t crtc_x, int32_t crtc_y, in __setplane_internal() argument 626 crtc_x > INT_MAX - (int32_t) crtc_w || in __setplane_internal() 630 crtc_w, crtc_h, crtc_x, crtc_y); in __setplane_internal() 641 crtc_x, crtc_y, crtc_w, crtc_h, in __setplane_internal() 664 int32_t crtc_x, int32_t crtc_y, in setplane_internal() argument 679 crtc_x, crtc_y, crtc_w, crtc_h, in setplane_internal() 737 plane_req->crtc_x, plane_req->crtc_y, in drm_mode_setplane() 757 int32_t crtc_x, crtc_y; in drm_mode_cursor_universal() local 789 crtc_x = req->x; in drm_mode_cursor_universal() 792 crtc_x = crtc->cursor_x; in drm_mode_cursor_universal() [all …]
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/drivers/gpu/drm/shmobile/ |
D | shmob_drm_plane.c | 37 unsigned int crtc_x; member 142 (splane->crtc_x << LDBBLOCR_CHLC_SHIFT)); in __shmob_drm_plane_setup() 177 struct drm_framebuffer *fb, int crtc_x, int crtc_y, in shmob_drm_plane_update() argument 203 splane->crtc_x = crtc_x; in shmob_drm_plane_update()
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/drivers/gpu/drm/atmel-hlcdc/ |
D | atmel_hlcdc_plane.c | 48 int crtc_x; member 368 ATMEL_HLCDC_LAYER_POS(state->crtc_x, in atmel_hlcdc_plane_update_pos_and_size() 577 disc_x = ovl_state->crtc_x; in atmel_hlcdc_plane_prepare_disc_area() 641 state->crtc_x = s->crtc_x; in atmel_hlcdc_plane_atomic_check() 670 if (state->crtc_x + state->crtc_w > mode->hdisplay) in atmel_hlcdc_plane_atomic_check() 671 patched_crtc_w = mode->hdisplay - state->crtc_x; in atmel_hlcdc_plane_atomic_check() 675 if (state->crtc_x < 0) { in atmel_hlcdc_plane_atomic_check() 676 patched_crtc_w += state->crtc_x; in atmel_hlcdc_plane_atomic_check() 677 x_offset = -state->crtc_x; in atmel_hlcdc_plane_atomic_check() 678 state->crtc_x = 0; in atmel_hlcdc_plane_atomic_check() [all …]
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/drivers/gpu/drm/msm/mdp/mdp5/ |
D | mdp5_plane.c | 37 int crtc_x, int crtc_y, 790 int crtc_x, int crtc_y, in mdp5_hwpipe_mode_set() argument 818 MDP5_PIPE_OUT_XY_X(crtc_x) | in mdp5_hwpipe_mode_set() 897 int crtc_x, crtc_y; in mdp5_plane_mode_set() local 920 crtc_x = dest->x1; in mdp5_plane_mode_set() 936 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); in mdp5_plane_mode_set() 949 crtc_x_r = crtc_x + crtc_w; in mdp5_plane_mode_set() 984 crtc_x, crtc_y, crtc_w, crtc_h, in mdp5_plane_mode_set() 1001 int crtc_x, int crtc_y, in mdp5_update_cursor_plane_legacy() argument 1040 new_plane_state->crtc_x = crtc_x; in mdp5_update_cursor_plane_legacy() [all …]
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/drivers/gpu/drm/virtio/ |
D | virtgpu_plane.c | 173 plane->state->crtc_x, plane->state->crtc_y, in virtio_gpu_primary_plane_update() 237 plane->state->crtc_x, in virtio_gpu_cursor_plane_update() 255 plane->state->crtc_x, in virtio_gpu_cursor_plane_update() 260 output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x); in virtio_gpu_cursor_plane_update()
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/drivers/gpu/drm/msm/mdp/mdp4/ |
D | mdp4_plane.c | 56 int crtc_x, int crtc_y, 146 state->crtc_x, state->crtc_y, in mdp4_plane_atomic_update() 220 int crtc_x, int crtc_y, in mdp4_plane_mode_set() argument 250 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); in mdp4_plane_mode_set() 320 MDP4_PIPE_DST_XY_X(crtc_x) | in mdp4_plane_mode_set()
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/drivers/gpu/drm/armada/ |
D | armada_trace.h | 30 int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h, 32 TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),
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D | armada_overlay.c | 99 int crtc_x, int crtc_y, unsigned crtc_w, unsigned crtc_h, in armada_ovl_plane_update() argument 112 .x1 = crtc_x, in armada_ovl_plane_update() 114 .x2 = crtc_x + crtc_w, in armada_ovl_plane_update() 127 crtc_x, crtc_y, crtc_w, crtc_h, in armada_ovl_plane_update()
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/drivers/gpu/drm/i915/ |
D | intel_sprite.c | 243 int crtc_x = plane_state->base.dst.x1; in skl_update_plane() local 292 I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y); in skl_update_plane() 298 I915_WRITE_FW(PLANE_POS(pipe, plane_id), (crtc_y << 16) | crtc_x); in skl_update_plane() 506 int crtc_x = plane_state->base.dst.x1; in vlv_update_plane() local 533 I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x); in vlv_update_plane() 657 int crtc_x = plane_state->base.dst.x1; in ivb_update_plane() local 687 I915_WRITE_FW(SPRPOS(pipe), (crtc_y << 16) | crtc_x); in ivb_update_plane() 813 int crtc_x = plane_state->base.dst.x1; in g4x_update_plane() local 843 I915_WRITE_FW(DVSPOS(pipe), (crtc_y << 16) | crtc_x); in g4x_update_plane() 906 int crtc_x, crtc_y; in intel_check_sprite_plane() local [all …]
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/drivers/gpu/drm/sun4i/ |
D | sun8i_mixer.c | 138 state->crtc_x, state->crtc_y); in sun8i_mixer_update_layer_coord() 141 SUN8I_MIXER_COORD(state->crtc_x, state->crtc_y)); in sun8i_mixer_update_layer_coord() 215 if (state->crtc_x < 0) in sun8i_mixer_update_layer_buffer() 216 paddr += -state->crtc_x * bpp; in sun8i_mixer_update_layer_buffer()
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D | sun4i_backend.c | 165 state->crtc_x, state->crtc_y); in sun4i_backend_update_layer_coord() 167 SUN4I_BACKEND_LAYCOOR(state->crtc_x, in sun4i_backend_update_layer_coord()
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/drivers/gpu/drm/hisilicon/kirin/ |
D | kirin_drm_ade.c | 784 struct drm_framebuffer *fb, int crtc_x, in ade_update_channel() argument 798 crtc_x, crtc_y, crtc_w, crtc_h); in ade_update_channel() 813 ade_compositor_routing_set(base, ch, crtc_x, crtc_y, in_w, in_h, fmt); in ade_update_channel() 844 int crtc_x = state->crtc_x; in ade_plane_atomic_check() local 870 if (crtc_x < 0 || crtc_y < 0) in ade_plane_atomic_check() 873 if (crtc_x + crtc_w > crtc_state->adjusted_mode.hdisplay || in ade_plane_atomic_check() 886 ade_update_channel(aplane, state->fb, state->crtc_x, state->crtc_y, in ade_plane_atomic_update()
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/drivers/gpu/drm/nouveau/dispnv04/ |
D | overlay.c | 115 struct drm_framebuffer *fb, int crtc_x, int crtc_y, in nv10_update_plane() argument 160 nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x); in nv10_update_plane() 363 struct drm_framebuffer *fb, int crtc_x, int crtc_y, in nv04_update_plane() argument 405 nvif_wr32(dev, NV_PVIDEO_WINDOW_START, crtc_y << 16 | crtc_x); in nv04_update_plane()
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/drivers/gpu/drm/meson/ |
D | meson_plane.c | 91 .x1 = state->crtc_x, in meson_plane_atomic_update() 93 .x2 = state->crtc_x + state->crtc_w, in meson_plane_atomic_update()
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D | meson_crtc.c | 186 .x1 = state->crtc_x, in meson_crtc_irq() 188 .x2 = state->crtc_x + state->crtc_w, in meson_crtc_irq()
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/drivers/staging/vboxvideo/ |
D | vbox_mode.c | 830 s32 crtc_x = in vbox_cursor_move() local 843 if (x + crtc_x < 0 || y + crtc_y < 0 || vbox->cursor_data_size == 0) in vbox_cursor_move() 846 ret = hgsmi_cursor_position(vbox->guest_pool, true, x + crtc_x, in vbox_cursor_move() 863 if (x + crtc_x < host_x) in vbox_cursor_move() 864 hot_x = min(host_x - x - crtc_x, vbox->cursor_width); in vbox_cursor_move()
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/drivers/gpu/drm/imx/ |
D | ipuv3-plane.h | 39 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
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/drivers/gpu/drm/omapdrm/ |
D | omap_plane.c | 128 if (state->crtc_x < 0 || state->crtc_y < 0) in omap_plane_atomic_check() 131 if (state->crtc_x + state->crtc_w > crtc_state->adjusted_mode.hdisplay) in omap_plane_atomic_check()
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/drivers/gpu/drm/sti/ |
D | sti_gdp.c | 629 dst_x = state->crtc_x; in sti_gdp_atomic_check() 713 (oldstate->crtc_x == state->crtc_x) && in sti_gdp_atomic_update() 738 dst_x = state->crtc_x; in sti_gdp_atomic_update()
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D | sti_cursor.c | 199 dst_x = state->crtc_x; in sti_cursor_atomic_check() 270 dst_x = state->crtc_x; in sti_cursor_atomic_update()
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/drivers/gpu/drm/tilcdc/ |
D | tilcdc_plane.c | 49 if (state->crtc_x || state->crtc_y) { in tilcdc_plane_atomic_check()
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/drivers/gpu/drm/rcar-du/ |
D | rcar_du_vsp.c | 58 .crtc_x = 0, in rcar_du_vsp_enable() 186 cfg.dst.left = state->state.crtc_x; in rcar_du_vsp_plane_setup()
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