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Searched refs:cz_hwmgr (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/powerplay/hwmgr/
Dcz_hwmgr.c162 struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); in cz_get_max_sclk_level() local
164 if (cz_hwmgr->max_sclk_level == 0) { in cz_get_max_sclk_level()
166 cz_hwmgr->max_sclk_level = smum_get_argument(hwmgr->smumgr) + 1; in cz_get_max_sclk_level()
169 return cz_hwmgr->max_sclk_level; in cz_get_max_sclk_level()
174 struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); in cz_initialize_dpm_defaults() local
179 cz_hwmgr->gfx_ramp_step = 256*25/100; in cz_initialize_dpm_defaults()
180 cz_hwmgr->gfx_ramp_delay = 1; /* by default, we delay 1us */ in cz_initialize_dpm_defaults()
183 cz_hwmgr->activity_target[i] = CZ_AT_DFLT; in cz_initialize_dpm_defaults()
185 cz_hwmgr->mgcg_cgtt_local0 = 0x00000000; in cz_initialize_dpm_defaults()
186 cz_hwmgr->mgcg_cgtt_local1 = 0x00000000; in cz_initialize_dpm_defaults()
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Dcz_clockpowergating.c118 struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); in cz_enable_disable_uvd_dpm() local
124 cz_hwmgr->dpm_flags |= DPMFlags_UVD_Enabled; in cz_enable_disable_uvd_dpm()
130 cz_hwmgr->dpm_flags &= ~DPMFlags_UVD_Enabled; in cz_enable_disable_uvd_dpm()
139 struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); in cz_enable_disable_vce_dpm() local
145 cz_hwmgr->dpm_flags |= DPMFlags_VCE_Enabled; in cz_enable_disable_vce_dpm()
151 cz_hwmgr->dpm_flags &= ~DPMFlags_VCE_Enabled; in cz_enable_disable_vce_dpm()
162 struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); in cz_dpm_powergate_uvd() local
164 cz_hwmgr->uvd_power_gated = bgate; in cz_dpm_powergate_uvd()
191 struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend); in cz_dpm_powergate_vce() local
204 cz_hwmgr->vce_power_gated = true; in cz_dpm_powergate_vce()
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DMakefile7 hardwaremanager.o pp_acpi.o cz_hwmgr.o \
Dcz_hwmgr.h187 struct cz_hwmgr { struct