Searched refs:dctl (Results 1 – 11 of 11) sorted by relevance
| /drivers/vme/bridges/ |
| D | vme_ca91cx42.c | 1058 entry->descriptor.dctl |= CA91CX42_DCTL_L2V; in ca91cx42_dma_list_add()
1095 entry->descriptor.dctl |= CA91CX42_DCTL_VCT_BLT; in ca91cx42_dma_list_add()
1100 entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D8; in ca91cx42_dma_list_add()
1103 entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D16; in ca91cx42_dma_list_add()
1106 entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D32; in ca91cx42_dma_list_add()
1109 entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64; in ca91cx42_dma_list_add()
1119 entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A16; in ca91cx42_dma_list_add()
1122 entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A24; in ca91cx42_dma_list_add()
1125 entry->descriptor.dctl |= CA91CX42_DCTL_VAS_A32; in ca91cx42_dma_list_add()
1128 entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER1; in ca91cx42_dma_list_add()
[all …]
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| D | vme_ca91cx42.h | 59 unsigned int dctl; /* DMA Control */ member
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| /drivers/video/fbdev/ |
| D | gxt4500.c | 565 int ctrl, dctl; in gxt4500_blank() local
569 dctl = readreg(par, DISP_CTL); in gxt4500_blank()
570 dctl |= DISP_CTL_OFF; in gxt4500_blank()
573 dctl &= ~DISP_CTL_OFF; in gxt4500_blank()
587 writereg(par, DISP_CTL, dctl); in gxt4500_blank()
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| /drivers/usb/dwc2/ |
| D | core_intr.c | 358 u32 dctl = dwc2_readl(hsotg->regs + DCTL); in dwc2_handle_wakeup_detected_intr() local
361 dctl &= ~DCTL_RMTWKUPSIG; in dwc2_handle_wakeup_detected_intr()
362 dwc2_writel(dctl, hsotg->regs + DCTL); in dwc2_handle_wakeup_detected_intr()
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| D | debugfs.c | 76 int dctl; in testmode_show() local
79 dctl = dwc2_readl(hsotg->regs + DCTL); in testmode_show()
80 dctl &= DCTL_TSTCTL_MASK; in testmode_show()
81 dctl >>= DCTL_TSTCTL_SHIFT; in testmode_show()
84 switch (dctl) { in testmode_show()
104 seq_printf(s, "UNKNOWN %d\n", dctl); in testmode_show()
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| D | gadget.c | 1487 int dctl = dwc2_readl(hsotg->regs + DCTL); in dwc2_hsotg_set_test_mode() local
1489 dctl &= ~DCTL_TSTCTL_MASK; in dwc2_hsotg_set_test_mode()
1496 dctl |= testmode << DCTL_TSTCTL_SHIFT; in dwc2_hsotg_set_test_mode()
1501 dwc2_writel(dctl, hsotg->regs + DCTL); in dwc2_hsotg_set_test_mode()
2749 int dctl = dwc2_readl(hsotg->regs + DCTL); in dwc2_gadget_handle_ep_disabled() local
2764 int dctl = dwc2_readl(hsotg->regs + DCTL); in dwc2_gadget_handle_ep_disabled() local
2766 dctl |= DCTL_CGNPINNAK; in dwc2_gadget_handle_ep_disabled()
2767 dwc2_writel(dctl, hsotg->regs + DCTL); in dwc2_gadget_handle_ep_disabled()
2772 if (dctl & DCTL_GOUTNAKSTS) { in dwc2_gadget_handle_ep_disabled()
2773 dctl |= DCTL_CGOUTNAK; in dwc2_gadget_handle_ep_disabled()
[all …]
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| D | core.h | 643 u32 dctl; member
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| D | hcd.c | 5093 u32 dctl; in dwc2_hcd_free() local
5138 dctl = dwc2_readl(hsotg->regs + DCTL); in dwc2_hcd_free()
5139 dctl |= DCTL_SFTDISCON; in dwc2_hcd_free()
5140 dwc2_writel(dctl, hsotg->regs + DCTL); in dwc2_hcd_free()
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| /drivers/net/fjes/ |
| D | fjes_hw.c | 71 union REG_DCTL dctl; in fjes_hw_reset() local
74 dctl.reg = 0; in fjes_hw_reset()
75 dctl.bits.reset = 1; in fjes_hw_reset()
76 wr32(XSCT_DCTL, dctl.reg); in fjes_hw_reset()
79 dctl.reg = rd32(XSCT_DCTL); in fjes_hw_reset()
80 while ((dctl.bits.reset == 1) && (timeout > 0)) { in fjes_hw_reset()
82 dctl.reg = rd32(XSCT_DCTL); in fjes_hw_reset()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | gf100.c | 98 read_div(struct gf100_clk *clk, int doff, u32 dsrc, u32 dctl) in read_div() argument
116 sctl = nvkm_rd32(device, dctl + (doff * 4)); in read_div()
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| D | gk104.c | 106 read_div(struct gk104_clk *clk, int doff, u32 dsrc, u32 dctl) in read_div() argument
110 u32 sctl = nvkm_rd32(device, dctl + (doff * 4)); in read_div()
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