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Searched refs:imr (Results 1 – 25 of 53) sorted by relevance

123

/drivers/spi/
Dspi-altera.c52 unsigned long imr; member
69 hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; in altera_spi_set_cs()
70 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); in altera_spi_set_cs()
74 hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK; in altera_spi_set_cs()
75 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); in altera_spi_set_cs()
131 hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK; in altera_spi_txrx()
132 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); in altera_spi_txrx()
163 hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK; in altera_spi_irq()
164 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL); in altera_spi_irq()
202 hw->imr = 0; /* disable spi interrupts */ in altera_spi_probe()
[all …]
/drivers/parisc/
Dgsc.c112 u32 imr; in gsc_asic_mask_irq() local
115 irq_dev->name, imr); in gsc_asic_mask_irq()
118 imr = gsc_readl(irq_dev->hpa + OFFSET_IMR); in gsc_asic_mask_irq()
119 imr &= ~(1 << local_irq); in gsc_asic_mask_irq()
120 gsc_writel(imr, irq_dev->hpa + OFFSET_IMR); in gsc_asic_mask_irq()
127 u32 imr; in gsc_asic_unmask_irq() local
130 irq_dev->name, imr); in gsc_asic_unmask_irq()
133 imr = gsc_readl(irq_dev->hpa + OFFSET_IMR); in gsc_asic_unmask_irq()
134 imr |= 1 << local_irq; in gsc_asic_unmask_irq()
135 gsc_writel(imr, irq_dev->hpa + OFFSET_IMR); in gsc_asic_unmask_irq()
Ddino.c149 u32 imr; /* IRQ's which are enabled */ member
318 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq)); in dino_mask_irq()
319 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); in dino_mask_irq()
339 dino_dev->imr |= DINO_MASK_IRQ(local_irq); /* used in dino_isr() */ in dino_unmask_irq()
340 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); in dino_unmask_irq()
404 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr; in dino_isr()
/drivers/tty/serial/
Daltera_uart.c85 unsigned short imr; /* Local IMR mirror */ member
122 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; in altera_uart_set_mctrl()
124 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; in altera_uart_set_mctrl()
125 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); in altera_uart_set_mctrl()
132 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK; in altera_uart_start_tx()
133 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); in altera_uart_start_tx()
140 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; in altera_uart_stop_tx()
141 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); in altera_uart_stop_tx()
148 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK; in altera_uart_stop_rx()
149 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG); in altera_uart_stop_rx()
[all …]
Daltera_jtaguart.c63 unsigned long imr; /* Local IMR mirror */ member
86 pp->imr |= ALTERA_JTAGUART_CONTROL_WE_MSK; in altera_jtaguart_start_tx()
87 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_start_tx()
95 pp->imr &= ~ALTERA_JTAGUART_CONTROL_WE_MSK; in altera_jtaguart_stop_tx()
96 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_stop_tx()
104 pp->imr &= ~ALTERA_JTAGUART_CONTROL_RE_MSK; in altera_jtaguart_stop_rx()
105 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_stop_rx()
178 pp->imr &= ~ALTERA_JTAGUART_CONTROL_WE_MSK; in altera_jtaguart_tx_chars()
179 writel(pp->imr, port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_tx_chars()
191 ALTERA_JTAGUART_CONTROL_RI_OFF) & pp->imr; in altera_jtaguart_interrupt()
[all …]
Dmcf.c59 unsigned char imr; /* Local IMR mirror */ member
112 pp->imr |= MCFUART_UIR_TXREADY; in mcf_start_tx()
113 writeb(pp->imr, port->membase + MCFUART_UIMR); in mcf_start_tx()
122 pp->imr &= ~MCFUART_UIR_TXREADY; in mcf_stop_tx()
123 writeb(pp->imr, port->membase + MCFUART_UIMR); in mcf_stop_tx()
132 pp->imr &= ~MCFUART_UIR_RXREADY; in mcf_stop_rx()
133 writeb(pp->imr, port->membase + MCFUART_UIMR); in mcf_stop_rx()
168 pp->imr = MCFUART_UIR_RXREADY; in mcf_startup()
169 writeb(pp->imr, port->membase + MCFUART_UIMR); in mcf_startup()
186 pp->imr = 0; in mcf_shutdown()
[all …]
Dmsm_serial.c187 unsigned int imr; member
410 msm_port->imr &= ~UART_IMR_TXLEV; in msm_stop_tx()
411 msm_write(port, msm_port->imr, UART_IMR); in msm_stop_tx()
423 msm_port->imr |= UART_IMR_TXLEV; in msm_start_tx()
424 msm_write(port, msm_port->imr, UART_IMR); in msm_start_tx()
473 msm_port->imr |= UART_IMR_TXLEV; in msm_complete_tx_dma()
474 msm_write(port, msm_port->imr, UART_IMR); in msm_complete_tx_dma()
521 msm_port->imr &= ~UART_IMR_TXLEV; in msm_handle_tx_dma()
522 msm_write(port, msm_port->imr, UART_IMR); in msm_handle_tx_dma()
640 msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE); in msm_start_rx_dma()
[all …]
Dsccnxp.c117 u8 imr; member
327 s->imr |= mask << (port->line * 4); in sccnxp_enable_irq()
328 sccnxp_write(port, SCCNXP_IMR_REG, s->imr); in sccnxp_enable_irq()
335 s->imr &= ~(mask << (port->line * 4)); in sccnxp_disable_irq()
336 sccnxp_write(port, SCCNXP_IMR_REG, s->imr); in sccnxp_disable_irq()
455 isr &= s->imr; in sccnxp_handle_events()
976 s->imr = 0; in sccnxp_probe()
/drivers/infiniband/hw/mlx5/
Dodp.c156 struct mlx5_ib_mr *mr = odp->private, *imr = mr->parent; in mr_leaf_free_action() local
162 if (imr->live) in mr_leaf_free_action()
163 mlx5_ib_update_xlt(imr, idx, 1, 0, in mr_leaf_free_action()
168 if (atomic_dec_and_test(&imr->num_leaf_free)) in mr_leaf_free_action()
169 wake_up(&imr->q_leaf_free); in mr_leaf_free_action()
442 struct mlx5_ib_mr *imr; in mlx5_ib_alloc_implicit_mr() local
449 imr = implicit_mr_alloc(&pd->ibpd, umem, 1, access_flags); in mlx5_ib_alloc_implicit_mr()
450 if (IS_ERR(imr)) { in mlx5_ib_alloc_implicit_mr()
452 return ERR_CAST(imr); in mlx5_ib_alloc_implicit_mr()
455 imr->umem = umem; in mlx5_ib_alloc_implicit_mr()
[all …]
/drivers/mfd/
Dt7l66xb.c210 u8 imr; in t7l66xb_irq_mask() local
213 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); in t7l66xb_irq_mask()
214 imr |= 1 << (data->irq - t7l66xb->irq_base); in t7l66xb_irq_mask()
215 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); in t7l66xb_irq_mask()
223 u8 imr; in t7l66xb_irq_unmask() local
226 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); in t7l66xb_irq_unmask()
227 imr &= ~(1 << (data->irq - t7l66xb->irq_base)); in t7l66xb_irq_unmask()
228 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); in t7l66xb_irq_unmask()
Dtwl4030-irq.c431 u32 imr; member
453 agent->imr |= BIT(data->irq - agent->irq_base); in twl4030_sih_mask()
461 agent->imr &= ~BIT(data->irq - agent->irq_base); in twl4030_sih_unmask()
495 } imr; in twl4030_sih_bus_sync_unlock() local
498 imr.word = cpu_to_le32(agent->imr); in twl4030_sih_bus_sync_unlock()
502 status = twl_i2c_write(sih->module, imr.bytes, in twl4030_sih_bus_sync_unlock()
652 agent->imr = ~0; in twl4030_sih_setup()
Dtc6393xb.c549 u8 imr; in tc6393xb_irq_mask() local
552 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); in tc6393xb_irq_mask()
553 imr |= 1 << (data->irq - tc6393xb->irq_base); in tc6393xb_irq_mask()
554 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); in tc6393xb_irq_mask()
562 u8 imr; in tc6393xb_irq_unmask() local
565 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); in tc6393xb_irq_unmask()
566 imr &= ~(1 << (data->irq - tc6393xb->irq_base)); in tc6393xb_irq_unmask()
567 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); in tc6393xb_irq_unmask()
/drivers/rtc/
Drtc-at91sam9.c76 u32 imr; member
509 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); in at91_rtc_shutdown()
510 rtt_writel(rtc, MR, mr & ~rtc->imr); in at91_rtc_shutdown()
526 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); in at91_rtc_suspend()
527 if (rtc->imr) { in at91_rtc_suspend()
539 rtt_writel(rtc, MR, mr & ~rtc->imr); in at91_rtc_suspend()
550 if (rtc->imr) { in at91_rtc_resume()
556 rtt_writel(rtc, MR, mr | rtc->imr); in at91_rtc_resume()
Drtc-at91rm9200.c281 unsigned long imr = at91_rtc_read_imr(); in at91_rtc_proc() local
284 (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); in at91_rtc_proc()
286 (imr & AT91_RTC_SECEV) ? "yes" : "no"); in at91_rtc_proc()
/drivers/iio/adc/
Dtwl4030-madc.c182 u8 imr; member
468 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, madc->imr); in twl4030_madc_disable_irq()
471 madc->imr); in twl4030_madc_disable_irq()
475 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, madc->imr); in twl4030_madc_disable_irq()
478 "unable to write imr register 0x%X\n", madc->imr); in twl4030_madc_disable_irq()
500 ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &imr_val, madc->imr); in twl4030_madc_threaded_irq_handler()
503 madc->imr); in twl4030_madc_threaded_irq_handler()
808 madc->imr = madc->use_second_irq ? TWL4030_MADC_IMR2 : in twl4030_madc_probe()
/drivers/clk/at91/
Dpmc.c64 u32 imr; member
97 regmap_read(pmcreg, AT91_PMC_IMR, &pmc_cache.imr); in pmc_suspend()
138 regmap_write(pmcreg, AT91_PMC_IMR, pmc_cache.imr); in pmc_resume()
/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_dc.c438 unsigned int imr, isr; in atmel_hlcdc_dc_irq_handler() local
441 regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_IMR, &imr); in atmel_hlcdc_dc_irq_handler()
443 status = imr & isr; in atmel_hlcdc_dc_irq_handler()
825 regmap_read(regmap, ATMEL_HLCDC_IMR, &dc->suspend.imr); in atmel_hlcdc_dc_drm_suspend()
826 regmap_write(regmap, ATMEL_HLCDC_IDR, dc->suspend.imr); in atmel_hlcdc_dc_drm_suspend()
838 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, dc->suspend.imr); in atmel_hlcdc_dc_drm_resume()
/drivers/gpu/drm/i915/gvt/
Dinterrupt.c180 u32 imr = *(u32 *)p_data; in intel_vgpu_reg_imr_handler() local
182 trace_write_ir(vgpu->id, "IMR", reg, imr, vgpu_vreg(vgpu, reg), in intel_vgpu_reg_imr_handler()
183 (vgpu_vreg(vgpu, reg) ^ imr)); in intel_vgpu_reg_imr_handler()
185 vgpu_vreg(vgpu, reg) = imr; in intel_vgpu_reg_imr_handler()
363 u32 imr = regbase_to_imr( in update_upstream_irq() local
366 vgpu_vreg(vgpu, iir) |= (set_bits & ~vgpu_vreg(vgpu, imr)); in update_upstream_irq()
/drivers/pcmcia/
Dpxa2xx_sharpsl.c115 unsigned short cpr, ncpr, ccr, nccr, mcr, nmcr, imr, nimr; in sharpsl_pcmcia_configure_socket() local
136 nimr = (imr = read_scoop_reg(scoop, SCOOP_IMR)) & ~0x003E; in sharpsl_pcmcia_configure_socket()
174 if (imr != nimr) in sharpsl_pcmcia_configure_socket()
/drivers/staging/ccree/
Dssi_driver.c120 u32 imr; in cc_isr() local
131 imr = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR)); in cc_isr()
140 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_COMP_IRQ_MASK); in cc_isr()
148 CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IMR), imr | SSI_GPR0_IRQ_MASK); in cc_isr()
/drivers/clocksource/
Dtcb_clksrc.c48 u32 imr; member
80 tcb_cache[i].imr = readl(tcaddr + ATMEL_TC_REG(i, IMR)); in tc_clksrc_suspend()
102 writel(tcb_cache[i].imr, tcaddr + ATMEL_TC_REG(i, IER)); in tc_clksrc_resume()
/drivers/net/ethernet/atheros/atlx/
Datlx.c158 unsigned int imr) in atlx_imr_set() argument
160 iowrite32(imr, adapter->hw.hw_addr + REG_IMR); in atlx_imr_set()
/drivers/net/can/
Dgrcan.c60 u32 imr; /* 0x110 */ member
487 grcan_write_reg(&regs->imr, GRCAN_IRQ_NONE); in grcan_stop_hardware()
793 grcan_clear_bits(&regs->imr, GRCAN_IRQ_TX | GRCAN_IRQ_RX); in grcan_interrupt()
828 u32 imr = grcan_read_reg(&regs->imr); in grcan_running_reset() local
856 grcan_write_reg(&regs->imr, imr); in grcan_running_reset()
996 grcan_write_reg(&regs->imr, GRCAN_IRQ_DEFAULT); in grcan_start()
1270 grcan_set_bits(&regs->imr, GRCAN_IRQ_TX | GRCAN_IRQ_RX); in grcan_poll()
/drivers/net/ethernet/apple/
Dmacmace.c287 mb->imr = 0xFF; /* disable all intrs for now */ in mace_reset()
415 mb->imr = RCVINT; in mace_open()
437 mb->imr = 0xFF; /* disable all irqs */ in mace_close()
631 mb->imr = RCVINT; in mace_tx_timeout()
/drivers/net/wireless/ath/ath5k/
Ddma.c455 u32 trigger_level, imr; in ath5k_hw_update_tx_triglevel() local
461 imr = ath5k_hw_set_imr(ah, ah->ah_imr & ~AR5K_INT_GLOBAL); in ath5k_hw_update_tx_triglevel()
488 ath5k_hw_set_imr(ah, imr); in ath5k_hw_update_tx_triglevel()

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