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Searched refs:limits (Results 1 – 25 of 126) sorted by relevance

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/drivers/media/i2c/
Dsmiapp-pll.c86 const struct smiapp_pll_limits *limits, in check_all_bounds() argument
94 limits->min_pll_ip_freq_hz, in check_all_bounds()
95 limits->max_pll_ip_freq_hz, in check_all_bounds()
100 limits->min_pll_multiplier, limits->max_pll_multiplier, in check_all_bounds()
105 limits->min_pll_op_freq_hz, limits->max_pll_op_freq_hz, in check_all_bounds()
135 limits->vt.min_sys_clk_freq_hz, in check_all_bounds()
136 limits->vt.max_sys_clk_freq_hz, in check_all_bounds()
141 limits->vt.min_pix_clk_freq_hz, in check_all_bounds()
142 limits->vt.max_pix_clk_freq_hz, in check_all_bounds()
160 struct device *dev, const struct smiapp_pll_limits *limits, in __smiapp_pll_calculate() argument
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Daptina-pll.c25 const struct aptina_pll_limits *limits, in aptina_pll_calculate() argument
38 if (pll->ext_clock < limits->ext_clock_min || in aptina_pll_calculate()
39 pll->ext_clock > limits->ext_clock_max) { in aptina_pll_calculate()
44 if (pll->pix_clock == 0 || pll->pix_clock > limits->pix_clock_max) { in aptina_pll_calculate()
64 mf_min = DIV_ROUND_UP(limits->m_min, pll->m); in aptina_pll_calculate()
65 mf_min = max(mf_min, limits->out_clock_min / in aptina_pll_calculate()
66 (pll->ext_clock / limits->n_min * pll->m)); in aptina_pll_calculate()
67 mf_min = max(mf_min, limits->n_min * limits->p1_min / div); in aptina_pll_calculate()
68 mf_max = limits->m_max / pll->m; in aptina_pll_calculate()
69 mf_max = min(mf_max, limits->out_clock_max / in aptina_pll_calculate()
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/drivers/infiniband/hw/mthca/
Dmthca_main.c168 mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8; in mthca_dev_lim()
196 mdev->limits.num_ports = dev_lim->num_ports; in mthca_dev_lim()
197 mdev->limits.vl_cap = dev_lim->max_vl; in mthca_dev_lim()
198 mdev->limits.mtu_cap = dev_lim->max_mtu; in mthca_dev_lim()
199 mdev->limits.gid_table_len = dev_lim->max_gids; in mthca_dev_lim()
200 mdev->limits.pkey_table_len = dev_lim->max_pkeys; in mthca_dev_lim()
201 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; in mthca_dev_lim()
207 mdev->limits.max_sg = min_t(int, dev_lim->max_sg, in mthca_dev_lim()
214 mdev->limits.max_wqes = dev_lim->max_qp_sz; in mthca_dev_lim()
215 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; in mthca_dev_lim()
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Dmthca_profile.c96 profile[MTHCA_RES_MTT].size = dev->limits.mtt_seg_size; in mthca_make_profile()
175 dev->limits.num_qps = profile[i].num; in mthca_make_profile()
180 dev->limits.num_eecs = profile[i].num; in mthca_make_profile()
185 dev->limits.num_srqs = profile[i].num; in mthca_make_profile()
190 dev->limits.num_cqs = profile[i].num; in mthca_make_profile()
201 dev->limits.num_eqs = profile[i].num; in mthca_make_profile()
214 dev->limits.num_mgms = profile[i].num >> 1; in mthca_make_profile()
215 dev->limits.num_amgms = profile[i].num >> 1; in mthca_make_profile()
222 dev->limits.num_mpts = profile[i].num; in mthca_make_profile()
228 dev->limits.num_mtt_segs = profile[i].num; in mthca_make_profile()
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Dmthca_mr.c223 for (i = dev->limits.mtt_seg_size / 8; i < size; i <<= 1) in __mthca_alloc_mtt()
269 mtt->first_seg * dev->limits.mtt_seg_size + in __mthca_write_mtt()
322 mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * dev->limits.mtt_seg_size + in mthca_tavor_write_mtt_seg()
341 BUG_ON(s % dev->limits.mtt_seg_size); in mthca_arbel_write_mtt_seg()
344 s / dev->limits.mtt_seg_size, &dma_handle); in mthca_arbel_write_mtt_seg()
478 mr->mtt->first_seg * dev->limits.mtt_seg_size); in mthca_mr_alloc()
492 key & (dev->limits.num_mpts - 1)); in mthca_mr_alloc()
559 (dev->limits.num_mpts - 1)); in mthca_free_mr()
593 idx = key & (dev->limits.num_mpts - 1); in mthca_fmr_alloc()
613 mtt_seg = mr->mtt->first_seg * dev->limits.mtt_seg_size; in mthca_fmr_alloc()
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Dmthca_provider.c96 props->page_size_cap = mdev->limits.page_size_cap; in mthca_query_device()
97 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps; in mthca_query_device()
98 props->max_qp_wr = mdev->limits.max_wqes; in mthca_query_device()
99 props->max_sge = mdev->limits.max_sg; in mthca_query_device()
101 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs; in mthca_query_device()
102 props->max_cqe = mdev->limits.max_cqes; in mthca_query_device()
103 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws; in mthca_query_device()
104 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds; in mthca_query_device()
106 props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma; in mthca_query_device()
108 props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs; in mthca_query_device()
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Dmthca_srq.c207 if (attr->max_wr > dev->limits.max_srq_wqes || in mthca_alloc_srq()
208 attr->max_sge > dev->limits.max_srq_sge) in mthca_alloc_srq()
224 if (!mthca_is_memfree(dev) && (ds > dev->limits.max_desc_sz)) in mthca_alloc_srq()
277 srq->srqn & (dev->limits.num_srqs - 1), in mthca_alloc_srq()
347 srq->srqn & (dev->limits.num_srqs - 1)); in mthca_free_srq()
429 srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1)); in mthca_srq_event()
643 return dev->limits.max_sg; in mthca_max_srq_sge()
659 return min_t(int, dev->limits.max_sg, in mthca_max_srq_sge()
660 ((1 << (fls(dev->limits.max_desc_sz) - 1)) - in mthca_max_srq_sge()
675 dev->limits.num_srqs, in mthca_init_srq_table()
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Dmthca_qp.c244 qp = mthca_array_get(&dev->qp_table.qp, qpn & (dev->limits.num_qps - 1)); in mthca_qp_event()
316 param.port_width = dev->limits.port_width_cap; in init_port()
317 param.vl_cap = dev->limits.vl_cap; in init_port()
318 param.mtu_cap = dev->limits.mtu_cap; in init_port()
319 param.gid_cap = dev->limits.gid_table_len; in init_port()
320 param.pkey_cap = dev->limits.pkey_table_len; in init_port()
404 if (port_num == 0 || port_num > dev->limits.num_ports) in to_rdma_ah_attr()
422 (dev->limits.gid_table_len - 1), in to_rdma_ah_attr()
532 if (grh->sgid_index >= dev->limits.gid_table_len) { in mthca_path_set()
535 dev->limits.gid_table_len - 1); in mthca_path_set()
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Dmthca_uar.c59 dev->limits.num_uars, in mthca_init_uar_table()
60 dev->limits.num_uars - 1, in mthca_init_uar_table()
61 dev->limits.reserved_uars + 1); in mthca_init_uar_table()
Dmthca_mcg.c205 BUG_ON(index < dev->limits.num_mgms); in mthca_multicast_attach()
285 BUG_ON(amgm_index_to_free < dev->limits.num_mgms); in mthca_multicast_detach()
304 BUG_ON(index < dev->limits.num_mgms); in mthca_multicast_detach()
318 int table_size = dev->limits.num_mgms + dev->limits.num_amgms; in mthca_init_mcg_table()
323 dev->limits.num_mgms); in mthca_init_mcg_table()
Dmthca_av.c98 if (dev->limits.stat_rate_support == 0x3 && mthca_rate) in mthca_rate_to_ib()
147 if (!(dev->limits.stat_rate_support & (1 << rate))) in mthca_get_rate()
212 dev->limits.gid_table_len + in mthca_create_ah()
286 ah->av->gid_index % dev->limits.gid_table_len, in mthca_read_ah()
320 (dev->limits.gid_table_len - 1), in mthca_ah_query()
Dmthca_pd.c72 dev->limits.num_pds, in mthca_init_pd_table()
74 dev->limits.reserved_pds); in mthca_init_pd_table()
Dmthca_cq.c226 cq = mthca_array_get(&dev->cq_table.cq, cqn & (dev->limits.num_cqs - 1)); in mthca_cq_completion()
246 cq = mthca_array_get(&dev->cq_table.cq, cqn & (dev->limits.num_cqs - 1)); in mthca_cq_event()
527 (dev->limits.num_qps - 1)); in mthca_poll_one()
855 cq->cqn & (dev->limits.num_cqs - 1), in mthca_init_cq()
932 cq->cqn & (dev->limits.num_cqs - 1)); in mthca_free_cq()
963 dev->limits.num_cqs, in mthca_init_cq_table()
965 dev->limits.reserved_cqs); in mthca_init_cq_table()
970 dev->limits.num_cqs); in mthca_init_cq_table()
979 mthca_array_cleanup(&dev->cq_table.cq, dev->limits.num_cqs); in mthca_cleanup_cq_table()
Dmthca_mad.c302 for (p = 0; p < dev->limits.num_ports; ++p) in mthca_create_agents()
316 for (p = 1; p <= dev->limits.num_ports; ++p) { in mthca_create_agents()
328 for (p = 0; p < dev->limits.num_ports; ++p) in mthca_create_agents()
341 for (p = 0; p < dev->limits.num_ports; ++p) { in mthca_free_agents()
/drivers/media/i2c/smiapp/
Dsmiapp-core.c251 .min_pre_pll_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_PRE_PLL_CLK_DIV], in smiapp_pll_try()
252 .max_pre_pll_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_PRE_PLL_CLK_DIV], in smiapp_pll_try()
253 .min_pll_ip_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ], in smiapp_pll_try()
254 .max_pll_ip_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_PLL_IP_FREQ_HZ], in smiapp_pll_try()
255 .min_pll_multiplier = sensor->limits[SMIAPP_LIMIT_MIN_PLL_MULTIPLIER], in smiapp_pll_try()
256 .max_pll_multiplier = sensor->limits[SMIAPP_LIMIT_MAX_PLL_MULTIPLIER], in smiapp_pll_try()
257 .min_pll_op_freq_hz = sensor->limits[SMIAPP_LIMIT_MIN_PLL_OP_FREQ_HZ], in smiapp_pll_try()
258 .max_pll_op_freq_hz = sensor->limits[SMIAPP_LIMIT_MAX_PLL_OP_FREQ_HZ], in smiapp_pll_try()
260 .op.min_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MIN_OP_SYS_CLK_DIV], in smiapp_pll_try()
261 .op.max_sys_clk_div = sensor->limits[SMIAPP_LIMIT_MAX_OP_SYS_CLK_DIV], in smiapp_pll_try()
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Dsmiapp-quirk.c55 sensor->limits[limit] = val; in smiapp_replace_limit()
111 .limits = jt8ew9_limits,
223 .limits = jt8ev1_limits,
238 .limits = tcm8500md_limits,
/drivers/video/fbdev/matrox/
Dmatroxfb_misc.c542 minfo->limits.pixel.vcomax = maxdac; in parse_pins1()
554 minfo->limits.pixel.vcomax = 220000; in default_pins1()
563 minfo->limits.pixel.vcomax = in parse_pins2()
564 minfo->limits.system.vcomax = (bd->pins[41] == 0xFF) ? 230000 : ((bd->pins[41] + 100) * 1000); in parse_pins2()
577 minfo->limits.pixel.vcomax = in default_pins2()
578 minfo->limits.system.vcomax = 230000; in default_pins2()
587 minfo->limits.pixel.vcomax = in parse_pins3()
588 minfo->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000); in parse_pins3()
605 minfo->limits.pixel.vcomax = in default_pins3()
606 minfo->limits.system.vcomax = 230000; in default_pins3()
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/drivers/macintosh/
Dtherm_adt746x.c78 u8 limits[3]; member
217 th->limits[0], th->limits[1], th->limits[2], in display_stats()
235 int var = th->temps[i] - th->limits[i]; in update_fans_speed()
312 th->limits[i] = default_limits_chip[i] + limit_adjust; in set_limit()
313 write_reg(th, LIMIT_REG[i], th->limits[i]); in set_limit()
316 th->limits[i] = default_limits_local[i] + limit_adjust; in set_limit()
376 BUILD_SHOW_FUNC_INT(sensor1_limit, th->limits[1])
377 BUILD_SHOW_FUNC_INT(sensor2_limit, th->limits[2])
533 th->initial_limits[2], th->limits[0], th->limits[1], in probe_thermostat()
534 th->limits[2]); in probe_thermostat()
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/drivers/md/
Ddm-table.c286 struct queue_limits *limits = data; in device_area_is_invalid() local
291 limits->logical_block_size >> SECTOR_SHIFT; in device_area_is_invalid()
364 limits->logical_block_size, bdevname(bdev, b)); in device_area_is_invalid()
373 limits->logical_block_size, bdevname(bdev, b)); in device_area_is_invalid()
472 struct queue_limits *limits = data; in dm_set_device_limits() local
483 if (bdev_stack_limits(limits, bdev, start) < 0) in dm_set_device_limits()
488 q->limits.physical_block_size, in dm_set_device_limits()
489 q->limits.logical_block_size, in dm_set_device_limits()
490 q->limits.alignment_offset, in dm_set_device_limits()
493 limits->zoned = blk_queue_zoned_model(q); in dm_set_device_limits()
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Ddm-zoned-target.c893 static void dmz_io_hints(struct dm_target *ti, struct queue_limits *limits) in dmz_io_hints() argument
898 limits->logical_block_size = DMZ_BLOCK_SIZE; in dmz_io_hints()
899 limits->physical_block_size = DMZ_BLOCK_SIZE; in dmz_io_hints()
901 blk_limits_io_min(limits, DMZ_BLOCK_SIZE); in dmz_io_hints()
902 blk_limits_io_opt(limits, DMZ_BLOCK_SIZE); in dmz_io_hints()
904 limits->discard_alignment = DMZ_BLOCK_SIZE; in dmz_io_hints()
905 limits->discard_granularity = DMZ_BLOCK_SIZE; in dmz_io_hints()
906 limits->max_discard_sectors = chunk_sectors; in dmz_io_hints()
907 limits->max_hw_discard_sectors = chunk_sectors; in dmz_io_hints()
908 limits->max_write_zeroes_sectors = chunk_sectors; in dmz_io_hints()
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/drivers/gpu/drm/amd/amdgpu/
Damdgpu_dpm.c519 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *limits = in amdgpu_parse_extended_power_table() local
529 1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record))); in amdgpu_parse_extended_power_table()
533 u32 size = limits->numEntries * in amdgpu_parse_extended_power_table()
542 limits->numEntries; in amdgpu_parse_extended_power_table()
543 entry = &limits->entries[0]; in amdgpu_parse_extended_power_table()
545 for (i = 0; i < limits->numEntries; i++) { in amdgpu_parse_extended_power_table()
582 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits = in amdgpu_parse_extended_power_table() local
588 u32 size = limits->numEntries * in amdgpu_parse_extended_power_table()
597 limits->numEntries; in amdgpu_parse_extended_power_table()
598 entry = &limits->entries[0]; in amdgpu_parse_extended_power_table()
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/drivers/regulator/
Dmax14577-regulator.c51 const struct maxim_charger_current *limits = in max14577_reg_get_current_limit() local
60 return limits->min; in max14577_reg_get_current_limit()
64 return limits->high_start + reg_data * limits->high_step; in max14577_reg_get_current_limit()
73 const struct maxim_charger_current *limits = in max14577_reg_set_current_limit() local
79 ret = maxim_charger_calc_reg_current(limits, min_uA, max_uA, &reg_data); in max14577_reg_set_current_limit()
/drivers/platform/x86/
Dintel_ips.c334 struct ips_mcp_limits *limits; member
645 if (avg > (ips->limits->core_temp_limit * 100)) in cpu_exceeded()
670 if (ips->mch_avg_temp > (ips->limits->mch_temp_limit * 100)) in mch_exceeded()
689 if (ips->mcp_power_limit < ips->limits->mcp_power_limit || in verify_limits()
691 ips->mcp_power_limit = ips->limits->mcp_power_limit; in verify_limits()
693 if (ips->mcp_temp_limit < ips->limits->core_temp_limit || in verify_limits()
694 ips->mcp_temp_limit < ips->limits->mch_temp_limit || in verify_limits()
696 ips->mcp_temp_limit = min(ips->limits->core_temp_limit, in verify_limits()
697 ips->limits->mch_temp_limit); in verify_limits()
1372 struct ips_mcp_limits *limits = NULL; in ips_detect_cpu() local
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/drivers/mfd/
Dmax14577.c71 int maxim_charger_calc_reg_current(const struct maxim_charger_current *limits, in maxim_charger_calc_reg_current() argument
79 if (min_ua > limits->max || max_ua < limits->min) in maxim_charger_calc_reg_current()
82 if (max_ua < limits->high_start) { in maxim_charger_calc_reg_current()
92 max_ua = min(limits->max, max_ua); in maxim_charger_calc_reg_current()
93 max_ua -= limits->high_start; in maxim_charger_calc_reg_current()
99 current_bits = max_ua / limits->high_step; in maxim_charger_calc_reg_current()
/drivers/gpu/drm/radeon/
Dr600_dpm.c1078 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *limits = in r600_parse_extended_power_table() local
1088 1 + (limits->numEntries * sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record))); in r600_parse_extended_power_table()
1092 u32 size = limits->numEntries * in r600_parse_extended_power_table()
1101 limits->numEntries; in r600_parse_extended_power_table()
1102 entry = &limits->entries[0]; in r600_parse_extended_power_table()
1104 for (i = 0; i < limits->numEntries; i++) { in r600_parse_extended_power_table()
1140 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *limits = in r600_parse_extended_power_table() local
1146 u32 size = limits->numEntries * in r600_parse_extended_power_table()
1155 limits->numEntries; in r600_parse_extended_power_table()
1156 entry = &limits->entries[0]; in r600_parse_extended_power_table()
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