/drivers/gpu/drm/amd/powerplay/smumgr/ |
D | iceland_smc.c | 1609 data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]); in iceland_convert_mc_registers() 2404 ni_table->mc_reg_table_entry[i].mc_data[j] = in iceland_copy_vbios_smc_reg_table() 2405 table->mc_reg_table_entry[i].mc_data[j]; in iceland_copy_vbios_smc_reg_table() 2443 table->mc_reg_table_entry[k].mc_data[j] = in iceland_set_mc_special_registers() 2445 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in iceland_set_mc_special_registers() 2455 table->mc_reg_table_entry[k].mc_data[j] = in iceland_set_mc_special_registers() 2457 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in iceland_set_mc_special_registers() 2460 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in iceland_set_mc_special_registers() 2471 table->mc_reg_table_entry[k].mc_data[j] = in iceland_set_mc_special_registers() 2472 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; in iceland_set_mc_special_registers() [all …]
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D | tonga_smumgr.h | 33 uint32_t mc_data[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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D | iceland_smumgr.h | 49 uint32_t mc_data[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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D | tonga_smc.c | 2100 data->value[i] = PP_HOST_TO_SMC_UL(entry->mc_data[j]); in tonga_convert_mc_registers() 3051 ni_table->mc_reg_table_entry[i].mc_data[j] = in tonga_copy_vbios_smc_reg_table() 3052 table->mc_reg_table_entry[i].mc_data[j]; in tonga_copy_vbios_smc_reg_table() 3092 table->mc_reg_table_entry[k].mc_data[j] = in tonga_set_mc_special_registers() 3094 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in tonga_set_mc_special_registers() 3104 table->mc_reg_table_entry[k].mc_data[j] = in tonga_set_mc_special_registers() 3106 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in tonga_set_mc_special_registers() 3109 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in tonga_set_mc_special_registers() 3119 table->mc_reg_table_entry[k].mc_data[j] = in tonga_set_mc_special_registers() 3120 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; in tonga_set_mc_special_registers() [all …]
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/drivers/gpu/drm/radeon/ |
D | btc_dpm.c | 1906 if (table->mc_reg_table_entry[j-1].mc_data[i] != in btc_set_valid_flag() 1907 table->mc_reg_table_entry[j].mc_data[i]) { in btc_set_valid_flag() 1929 table->mc_reg_table_entry[k].mc_data[j] = in btc_set_mc_special_registers() 1931 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in btc_set_mc_special_registers() 1942 table->mc_reg_table_entry[k].mc_data[j] = in btc_set_mc_special_registers() 1944 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in btc_set_mc_special_registers() 1946 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in btc_set_mc_special_registers() 1958 table->mc_reg_table_entry[k].mc_data[j] = in btc_set_mc_special_registers() 1960 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in btc_set_mc_special_registers() 2008 eg_table->mc_reg_table_entry[i].mc_data[j] = in btc_copy_vbios_mc_reg_table() [all …]
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D | ci_dpm.c | 4328 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4329 ((temp_reg & 0xffff0000)) | ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in ci_set_mc_special_registers() 4339 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4340 (temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in ci_set_mc_special_registers() 4342 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in ci_set_mc_special_registers() 4352 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4353 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; in ci_set_mc_special_registers() 4365 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4366 (temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in ci_set_mc_special_registers() 4462 if (table->mc_reg_table_entry[j-1].mc_data[i] != in ci_set_valid_flag() [all …]
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D | cypress_dpm.h | 31 u32 mc_data[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member
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D | si_dpm.h | 109 u32 mc_data[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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D | ni_dpm.h | 49 u32 mc_data[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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D | ni_dpm.c | 2723 table->mc_reg_table_entry[k].mc_data[j] = in ni_set_mc_special_registers() 2725 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in ni_set_mc_special_registers() 2734 table->mc_reg_table_entry[k].mc_data[j] = in ni_set_mc_special_registers() 2736 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in ni_set_mc_special_registers() 2738 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in ni_set_mc_special_registers() 2749 table->mc_reg_table_entry[k].mc_data[j] = in ni_set_mc_special_registers() 2751 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in ni_set_mc_special_registers() 2824 if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) { in ni_set_valid_flag() 2861 ni_table->mc_reg_table_entry[i].mc_data[j] = in ni_copy_vbios_mc_reg_table() 2862 table->mc_reg_table_entry[i].mc_data[j]; in ni_copy_vbios_mc_reg_table() [all …]
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D | ci_dpm.h | 78 u32 mc_data[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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D | si_dpm.c | 5370 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5372 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in si_set_mc_special_registers() 5381 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5383 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in si_set_mc_special_registers() 5385 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in si_set_mc_special_registers() 5395 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5396 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; in si_set_mc_special_registers() 5407 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5409 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in si_set_mc_special_registers() 5485 if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) { in si_set_valid_flag() [all …]
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D | cypress_dpm.c | 821 data->value[i] = cpu_to_be32(entry->mc_data[j]); in cypress_convert_mc_registers() 1037 entry->mc_data[i] = in cypress_retrieve_ac_timing_for_one_entry() 1061 if (eg_pi->mc_reg_table.mc_reg_table_entry[j-1].mc_data[i] != in cypress_retrieve_ac_timing_for_all_ranges() 1062 eg_pi->mc_reg_table.mc_reg_table_entry[j].mc_data[i]) { in cypress_retrieve_ac_timing_for_all_ranges()
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D | radeon_mode.h | 662 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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D | radeon_atombios.c | 4031 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in radeon_atom_init_mc_reg_table() 4035 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in radeon_atom_init_mc_reg_table() 4036 reg_table->mc_reg_table_entry[num_ranges].mc_data[i - 1]; in radeon_atom_init_mc_reg_table()
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/drivers/gpu/drm/amd/amdgpu/ |
D | ci_dpm.c | 4532 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4533 ((temp_reg & 0xffff0000)) | ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in ci_set_mc_special_registers() 4543 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4544 (temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in ci_set_mc_special_registers() 4546 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in ci_set_mc_special_registers() 4556 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4557 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; in ci_set_mc_special_registers() 4569 table->mc_reg_table_entry[k].mc_data[j] = in ci_set_mc_special_registers() 4570 (temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in ci_set_mc_special_registers() 4666 if (table->mc_reg_table_entry[j-1].mc_data[i] != in ci_set_valid_flag() [all …]
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D | si_dpm.h | 271 u32 mc_data[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member 308 u32 mc_data[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member 925 u32 mc_data[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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D | amdgpu_atombios.h | 104 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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D | ci_dpm.h | 79 u32 mc_data[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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D | si_dpm.c | 5828 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5830 ((table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16); in si_set_mc_special_registers() 5839 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5841 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in si_set_mc_special_registers() 5843 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; in si_set_mc_special_registers() 5853 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5854 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; in si_set_mc_special_registers() 5865 table->mc_reg_table_entry[k].mc_data[j] = in si_set_mc_special_registers() 5867 (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); in si_set_mc_special_registers() 5942 if (table->mc_reg_table_entry[j-1].mc_data[i] != table->mc_reg_table_entry[j].mc_data[i]) { in si_set_valid_flag() [all …]
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D | amdgpu_atombios.c | 1623 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in amdgpu_atombios_init_mc_reg_table() 1627 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in amdgpu_atombios_init_mc_reg_table() 1628 reg_table->mc_reg_table_entry[num_ranges].mc_data[i - 1]; in amdgpu_atombios_init_mc_reg_table()
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/drivers/media/dvb-frontends/drx39xyj/ |
D | drxj.c | 11632 static int drx_check_firmware(struct drx_demod_instance *demod, u8 *mc_data, in drx_check_firmware() argument 11639 u16 mc_nr_of_blks = be16_to_cpu(*(__be16 *)(mc_data + sizeof(u16))); in drx_check_firmware() 11657 block_hdr.addr = be32_to_cpu(*(__be32 *)(mc_data + count)); in drx_check_firmware() 11659 block_hdr.size = be16_to_cpu(*(__be16 *)(mc_data + count)); in drx_check_firmware() 11661 block_hdr.flags = be16_to_cpu(*(__be16 *)(mc_data + count)); in drx_check_firmware() 11663 block_hdr.CRC = be16_to_cpu(*(__be16 *)(mc_data + count)); in drx_check_firmware() 11671 u8 *auxblk = ((void *)mc_data) + block_hdr.addr; in drx_check_firmware() 11740 u8 *mc_data = NULL; in drx_ctrl_u_code() local 11773 mc_data = (void *)mc_data_init; in drx_ctrl_u_code() 11775 mc_magic_word = be16_to_cpu(*(__be16 *)(mc_data)); in drx_ctrl_u_code() [all …]
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/drivers/gpu/drm/amd/powerplay/hwmgr/ |
D | ppatomctrl.h | 213 uint32_t mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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D | ppatomctrl.c | 70 table->mc_reg_table_entry[num_ranges].mc_data[i] = in atomctrl_retrieve_ac_timing() 75 table->mc_reg_table_entry[num_ranges].mc_data[i] = in atomctrl_retrieve_ac_timing() 76 table->mc_reg_table_entry[num_ranges].mc_data[i-1]; in atomctrl_retrieve_ac_timing()
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