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/drivers/media/pci/solo6x10/
Dsolo6x10-regs.h41 #define SOLO_DMA_CTRL_REFRESH_CYCLE(n) ((n)<<8) argument
43 #define SOLO_DMA_CTRL_SDRAM_SIZE(n) ((n)<<6) argument
48 #define SOLO_DMA_CTRL_LATENCY(n) ((n)<<0) argument
56 #define SOLO_VCLK_SELECT(n) ((n)<<20) argument
57 #define SOLO_VCLK_VIN1415_DELAY(n) ((n)<<14) argument
58 #define SOLO_VCLK_VIN1213_DELAY(n) ((n)<<12) argument
59 #define SOLO_VCLK_VIN1011_DELAY(n) ((n)<<10) argument
60 #define SOLO_VCLK_VIN0809_DELAY(n) ((n)<<8) argument
61 #define SOLO_VCLK_VIN0607_DELAY(n) ((n)<<6) argument
62 #define SOLO_VCLK_VIN0405_DELAY(n) ((n)<<4) argument
[all …]
Dsolo6x10-tw28.h28 #define TW_CHIP_OFFSET_ADDR(n) (TW_BASE_ADDR + (n)) argument
32 #define TW_HUE_ADDR(n) (0x07 | ((n) << 4)) argument
33 #define TW_SATURATION_ADDR(n) (0x08 | ((n) << 4)) argument
34 #define TW_CONTRAST_ADDR(n) (0x09 | ((n) << 4)) argument
35 #define TW_BRIGHTNESS_ADDR(n) (0x0a | ((n) << 4)) argument
37 #define TW_AUDIO_INPUT_GAIN_ADDR(n) (0x60 + ((n > 1) ? 1 : 0)) argument
41 #define TW286x_HUE_ADDR(n) (0x06 | ((n) << 4)) argument
42 #define TW286x_SATURATIONU_ADDR(n) (0x04 | ((n) << 4)) argument
43 #define TW286x_SATURATIONV_ADDR(n) (0x05 | ((n) << 4)) argument
44 #define TW286x_CONTRAST_ADDR(n) (0x02 | ((n) << 4)) argument
[all …]
/drivers/media/common/siano/
Dsmsdvb-debugfs.c52 int n = 0; in smsdvb_print_dvb_stats() local
63 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
65 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
67 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
69 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
71 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
73 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
75 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
77 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
79 n += snprintf(&buf[n], PAGE_SIZE - n, in smsdvb_print_dvb_stats()
[all …]
/drivers/gpu/drm/rockchip/
Dinno_hdmi.h56 #define v_VIDEO_INPUT_FORMAT(n) (n << 1) argument
69 #define v_VIDEO_OUTPUT_COLOR(n) (((n) & 0x3) << 6) argument
70 #define v_VIDEO_INPUT_BITS(n) (n << 4) argument
71 #define v_VIDEO_INPUT_CSP(n) (n << 0) argument
81 #define v_VIDEO_AUTO_CSC(n) (n << 7) argument
83 #define v_VIDEO_C0_C2_SWAP(n) (n << 0) argument
96 #define v_COLOR_DEPTH_NOT_INDICATED(n) ((n) << 4) argument
109 #define v_AVMUTE_CLEAR(n) (n << 7) argument
110 #define v_AVMUTE_ENABLE(n) (n << 6) argument
111 #define v_AUDIO_MUTE(n) (n << 1) argument
[all …]
/drivers/usb/gadget/udc/
Dfusb300_udc.h24 #define FUSB300_OFFSET_EPSET0(n) (0x20 + (n - 1) * 0x30) argument
25 #define FUSB300_OFFSET_EPSET1(n) (0x24 + (n - 1) * 0x30) argument
26 #define FUSB300_OFFSET_EPSET2(n) (0x28 + (n - 1) * 0x30) argument
27 #define FUSB300_OFFSET_EPFFR(n) (0x2c + (n - 1) * 0x30) argument
28 #define FUSB300_OFFSET_EPSTRID(n) (0x40 + (n - 1) * 0x30) argument
57 #define FUSB300_OFFSET_EPPRD_W0(n) (0x520 + (n - 1) * 0x10) argument
58 #define FUSB300_OFFSET_EPPRD_W1(n) (0x524 + (n - 1) * 0x10) argument
59 #define FUSB300_OFFSET_EPPRD_W2(n) (0x528 + (n - 1) * 0x10) argument
60 #define FUSB300_OFFSET_EPRD_PTR(n) (0x52C + (n - 1) * 0x10) argument
63 #define FUSB300_OFFSET_EPPORT(n) (0x1010 + (n - 1) * 0x10) argument
[all …]
/drivers/media/cec/
Dcec-notifier.c47 struct cec_notifier *n; in cec_notifier_get() local
50 list_for_each_entry(n, &cec_notifiers, head) { in cec_notifier_get()
51 if (n->dev == dev) { in cec_notifier_get()
52 kref_get(&n->kref); in cec_notifier_get()
54 return n; in cec_notifier_get()
57 n = kzalloc(sizeof(*n), GFP_KERNEL); in cec_notifier_get()
58 if (!n) in cec_notifier_get()
60 n->dev = dev; in cec_notifier_get()
61 n->phys_addr = CEC_PHYS_ADDR_INVALID; in cec_notifier_get()
62 mutex_init(&n->lock); in cec_notifier_get()
[all …]
/drivers/usb/dwc3/
Dcore.h120 #define DWC3_GUSB2PHYCFG(n) (0xc200 + ((n) * 0x04)) argument
121 #define DWC3_GUSB2I2CCTL(n) (0xc240 + ((n) * 0x04)) argument
123 #define DWC3_GUSB2PHYACC(n) (0xc280 + ((n) * 0x04)) argument
125 #define DWC3_GUSB3PIPECTL(n) (0xc2c0 + ((n) * 0x04)) argument
127 #define DWC3_GTXFIFOSIZ(n) (0xc300 + ((n) * 0x04)) argument
128 #define DWC3_GRXFIFOSIZ(n) (0xc380 + ((n) * 0x04)) argument
130 #define DWC3_GEVNTADRLO(n) (0xc400 + ((n) * 0x10)) argument
131 #define DWC3_GEVNTADRHI(n) (0xc404 + ((n) * 0x10)) argument
132 #define DWC3_GEVNTSIZ(n) (0xc408 + ((n) * 0x10)) argument
133 #define DWC3_GEVNTCOUNT(n) (0xc40c + ((n) * 0x10)) argument
[all …]
/drivers/media/platform/vsp1/
Dvsp1_regs.h20 #define VI6_CMD(n) (0x0000 + (n) * 4) argument
31 #define VI6_SRESET_SRTS(n) (1 << (n)) argument
34 #define VI6_STATUS_SYS_ACT(n) (1 << ((n) + 8)) argument
36 #define VI6_WPF_IRQ_ENB(n) (0x0048 + (n) * 12) argument
40 #define VI6_WPF_IRQ_STA(n) (0x004c + (n) * 12) argument
47 #define VI6_DISP_IRQ_ENB_LNEE(n) (1 << (n)) argument
52 #define VI6_DISP_IRQ_STA_LNE(n) (1 << (n)) argument
54 #define VI6_WPF_LINE_COUNT(n) (0x0084 + (n) * 4) argument
71 #define VI6_DL_HDR_ADDR(n) (0x0104 + (n) * 4) argument
246 #define VI6_WPF_SRCRPF_RPF_ACT_DIS(n) (0 << ((n) * 2)) argument
[all …]
/drivers/video/fbdev/omap2/omapfb/dss/
Ddispc.h46 #define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \ argument
47 DISPC_BA0_OFFSET(n))
48 #define DISPC_OVL_BA1(n) (DISPC_OVL_BASE(n) + \ argument
49 DISPC_BA1_OFFSET(n))
50 #define DISPC_OVL_BA0_UV(n) (DISPC_OVL_BASE(n) + \ argument
51 DISPC_BA0_UV_OFFSET(n))
52 #define DISPC_OVL_BA1_UV(n) (DISPC_OVL_BASE(n) + \ argument
53 DISPC_BA1_UV_OFFSET(n))
54 #define DISPC_OVL_POSITION(n) (DISPC_OVL_BASE(n) + \ argument
55 DISPC_POS_OFFSET(n))
[all …]
/drivers/gpu/drm/omapdrm/dss/
Ddispc.h51 #define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \ argument
52 DISPC_BA0_OFFSET(n))
53 #define DISPC_OVL_BA1(n) (DISPC_OVL_BASE(n) + \ argument
54 DISPC_BA1_OFFSET(n))
55 #define DISPC_OVL_BA0_UV(n) (DISPC_OVL_BASE(n) + \ argument
56 DISPC_BA0_UV_OFFSET(n))
57 #define DISPC_OVL_BA1_UV(n) (DISPC_OVL_BASE(n) + \ argument
58 DISPC_BA1_UV_OFFSET(n))
59 #define DISPC_OVL_POSITION(n) (DISPC_OVL_BASE(n) + \ argument
60 DISPC_POS_OFFSET(n))
[all …]
Domapdss-boot-init.c122 struct dss_conv_node *n = kmalloc(sizeof(*n), GFP_KERNEL); in omapdss_add_to_list() local
123 if (n) { in omapdss_add_to_list()
124 n->node = node; in omapdss_add_to_list()
125 n->root = root; in omapdss_add_to_list()
126 list_add(&n->list, &dss_conv_list); in omapdss_add_to_list()
132 struct dss_conv_node *n; in omapdss_list_contains() local
134 list_for_each_entry(n, &dss_conv_list, list) { in omapdss_list_contains()
135 if (n->node == node) in omapdss_list_contains()
144 struct device_node *n; in omapdss_walk_device() local
152 n = of_get_child_by_name(node, "ports"); in omapdss_walk_device()
[all …]
/drivers/gpu/drm/rcar-du/
Drcar_du_regs.h75 #define DSSR_DFB(n) (1 << ((n)+15)) argument
81 #define DSSR_ADC(n) (1 << ((n)-1)) argument
89 #define DSRCR_ADCL(n) (1 << ((n)-1)) argument
98 #define DIER_ADCE(n) (1 << ((n)-1)) argument
107 #define DPPR_DPE(n) (1 << ((n)*4-1)) argument
108 #define DPPR_DPS(n, p) (((p)-1) << DPPR_DPS_SHIFT(n)) argument
109 #define DPPR_DPS_SHIFT(n) (((n)-1)*4) argument
157 #define DVCSR_VCnFB2_DSA0(n) (0 << ((n)*2+16)) argument
158 #define DVCSR_VCnFB2_DSA1(n) (1 << ((n)*2+16)) argument
159 #define DVCSR_VCnFB2_DSA2(n) (2 << ((n)*2+16)) argument
[all …]
/drivers/gpu/drm/panel/
Dpanel-sitronix-st7789v.c25 #define ST7789V_RAMCTRL_EPF(n) (((n) & 3) << 4) argument
29 #define ST7789V_RGBCTRL_RCM(n) (((n) & 3) << 5) argument
33 #define ST7789V_RGBCTRL_VBP(n) ((n) & 0x7f) argument
34 #define ST7789V_RGBCTRL_HBP(n) ((n) & 0x1f) argument
37 #define ST7789V_PORCTRL_IDLE_BP(n) (((n) & 0xf) << 4) argument
38 #define ST7789V_PORCTRL_IDLE_FP(n) ((n) & 0xf) argument
39 #define ST7789V_PORCTRL_PARTIAL_BP(n) (((n) & 0xf) << 4) argument
40 #define ST7789V_PORCTRL_PARTIAL_FP(n) ((n) & 0xf) argument
43 #define ST7789V_GCTRL_VGHS(n) (((n) & 7) << 4) argument
44 #define ST7789V_GCTRL_VGLS(n) ((n) & 7) argument
[all …]
/drivers/gpu/drm/i915/selftests/
Dintel_breadcrumbs.c38 int n; in check_rbtree() local
45 n = find_first_bit(bitmap, count); in check_rbtree()
56 if (n != idx) { in check_rbtree()
58 idx, w->seqno, n); in check_rbtree()
62 n = find_next_bit(bitmap, count, n + 1); in check_rbtree()
73 int n; in check_completion() local
75 for (n = 0; n < count; n++) { in check_completion()
76 if (intel_wait_complete(&waiters[n]) != !!test_bit(n, bitmap)) in check_completion()
80 n, waiters[n].seqno, in check_completion()
81 intel_wait_complete(&waiters[n]) ? "complete" : "active", in check_completion()
[all …]
/drivers/vhost/
Dtest.c44 static void handle_vq(struct vhost_test *n) in handle_vq() argument
46 struct vhost_virtqueue *vq = &n->vqs[VHOST_TEST_VQ]; in handle_vq()
59 vhost_disable_notify(&n->dev, vq); in handle_vq()
71 if (unlikely(vhost_enable_notify(&n->dev, vq))) { in handle_vq()
72 vhost_disable_notify(&n->dev, vq); in handle_vq()
88 vhost_add_used_and_signal(&n->dev, vq, head, 0); in handle_vq()
101 struct vhost_test *n = container_of(vq->dev, struct vhost_test, dev); in handle_vq_kick() local
103 handle_vq(n); in handle_vq_kick()
108 struct vhost_test *n = kmalloc(sizeof *n, GFP_KERNEL); in vhost_test_open() local
112 if (!n) in vhost_test_open()
[all …]
Dnet.c243 static void vhost_net_clear_ubuf_info(struct vhost_net *n) in vhost_net_clear_ubuf_info() argument
248 kfree(n->vqs[i].ubuf_info); in vhost_net_clear_ubuf_info()
249 n->vqs[i].ubuf_info = NULL; in vhost_net_clear_ubuf_info()
253 static int vhost_net_set_ubuf_info(struct vhost_net *n) in vhost_net_set_ubuf_info() argument
262 n->vqs[i].ubuf_info = kmalloc(sizeof(*n->vqs[i].ubuf_info) * in vhost_net_set_ubuf_info()
264 if (!n->vqs[i].ubuf_info) in vhost_net_set_ubuf_info()
270 vhost_net_clear_ubuf_info(n); in vhost_net_set_ubuf_info()
274 static void vhost_net_vq_reset(struct vhost_net *n) in vhost_net_vq_reset() argument
278 vhost_net_clear_ubuf_info(n); in vhost_net_vq_reset()
281 n->vqs[i].done_idx = 0; in vhost_net_vq_reset()
[all …]
/drivers/gpu/drm/selftests/
Dtest-drm_mm.c108 unsigned long n; in assert_continuous() local
114 n = 0; in assert_continuous()
119 n, addr, node->start); in assert_continuous()
125 n, size, node->size); in assert_continuous()
130 pr_err("node[%ld] is followed by a hole!\n", n); in assert_continuous()
150 n++; in assert_continuous()
354 int n; in check_reserve_boundaries() local
356 for (n = 0; n < ARRAY_SIZE(boundaries); n++) { in check_reserve_boundaries()
359 boundaries[n].start, in check_reserve_boundaries()
360 boundaries[n].size))) { in check_reserve_boundaries()
[all …]
/drivers/phy/marvell/
Dphy-mvebu-cp110-comphy.c20 #define MVEBU_COMPHY_SERDES_CFG0(n) (0x0 + (n) * 0x1000) argument
22 #define MVEBU_COMPHY_SERDES_CFG0_GEN_RX(n) ((n) << 3) argument
23 #define MVEBU_COMPHY_SERDES_CFG0_GEN_TX(n) ((n) << 7) argument
27 #define MVEBU_COMPHY_SERDES_CFG1(n) (0x4 + (n) * 0x1000) argument
32 #define MVEBU_COMPHY_SERDES_CFG2(n) (0x8 + (n) * 0x1000) argument
34 #define MVEBU_COMPHY_SERDES_STATUS0(n) (0x18 + (n) * 0x1000) argument
38 #define MVEBU_COMPHY_PWRPLL_CTRL(n) (0x804 + (n) * 0x1000) argument
39 #define MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(n) ((n) << 0) argument
40 #define MVEBU_COMPHY_PWRPLL_PHY_MODE(n) ((n) << 5) argument
41 #define MVEBU_COMPHY_IMP_CAL(n) (0x80c + (n) * 0x1000) argument
[all …]
/drivers/video/fbdev/
Dc2p_core.h32 static inline u32 get_mask(unsigned int n) in get_mask() argument
34 switch (n) { in get_mask()
60 static inline void transp8(u32 d[], unsigned int n, unsigned int m) in transp8() argument
62 u32 mask = get_mask(n); in transp8()
67 _transp(d, 0, 1, n, mask); in transp8()
69 _transp(d, 2, 3, n, mask); in transp8()
71 _transp(d, 4, 5, n, mask); in transp8()
73 _transp(d, 6, 7, n, mask); in transp8()
78 _transp(d, 0, 2, n, mask); in transp8()
79 _transp(d, 1, 3, n, mask); in transp8()
[all …]
/drivers/media/rc/
Dir-xmp-decoder.c84 u32 *n; in ir_xmp_decode() local
94 n = data->durations; in ir_xmp_decode()
100 divider = (n[3] - XMP_NIBBLE_PREFIX) / 15 - 2000; in ir_xmp_decode()
109 n[i] = (n[i] - XMP_NIBBLE_PREFIX) / divider; in ir_xmp_decode()
110 sum1 = (15 + n[0] + n[1] + n[2] + n[3] + in ir_xmp_decode()
111 n[4] + n[5] + n[6] + n[7]) % 16; in ir_xmp_decode()
112 sum2 = (15 + n[8] + n[9] + n[10] + n[11] + in ir_xmp_decode()
113 n[12] + n[13] + n[14] + n[15]) % 16; in ir_xmp_decode()
122 subaddr = n[0] << 4 | n[2]; in ir_xmp_decode()
123 subaddr2 = n[8] << 4 | n[11]; in ir_xmp_decode()
[all …]
/drivers/crypto/inside-secure/
Dsafexcel.h102 #define EIP197_HIA_xDR_CFG_WR_CACHE(n) (((n) & 0x7) << 25) argument
103 #define EIP197_HIA_xDR_CFG_RD_CACHE(n) (((n) & 0x7) << 29) argument
106 #define EIP197_HIA_CDR_THRESH_PROC_PKT(n) (n) argument
109 #define EIP197_HIA_CDR_THRESH_TIMEOUT(n) ((n) << 24) /* x256 clk cycles */ argument
112 #define EIP197_HIA_RDR_THRESH_PROC_PKT(n) (n) argument
114 #define EIP197_HIA_RDR_THRESH_TIMEOUT(n) ((n) << 24) /* x256 clk cycles */ argument
120 #define EIP197_xDR_PROC_xD_COUNT(n) ((n) << 2) argument
121 #define EIP197_xDR_PROC_xD_PKT(n) ((n) << 24) argument
135 #define EIP197_CDR_IRQ(n) BIT((n) * 2) argument
136 #define EIP197_RDR_IRQ(n) BIT((n) * 2 + 1) argument
[all …]
/drivers/gpu/drm/sun4i/
Dsun4i_hdmi.h48 #define SUN4I_HDMI_AVI_INFOFRAME_REG(n) (0x080 + (n)) argument
67 #define SUN4I_HDMI_PAD_CTRL1_REG_EMP(n) (((n) & 7) << 10) argument
69 #define SUN4I_HDMI_PAD_CTRL1_REG_AMP(n) (((n) & 7) << 3) argument
78 #define SUN4I_HDMI_PLL_CTRL_VCO_GAIN(n) (((n) & 7) << 20) argument
79 #define SUN4I_HDMI_PLL_CTRL_S(n) (((n) & 7) << 17) argument
80 #define SUN4I_HDMI_PLL_CTRL_CP_S(n) (((n) & 0x1f) << 12) argument
81 #define SUN4I_HDMI_PLL_CTRL_CS(n) (((n) & 0xf) << 8) argument
82 #define SUN4I_HDMI_PLL_CTRL_DIV(n) (((n) & 0xf) << 4) argument
84 #define SUN4I_HDMI_PLL_CTRL_VCO_S(n) ((n) & 0xf) argument
87 #define SUN4I_HDMI_PLL_DBG0_TMDS_PARENT(n) (((n) & 1) << 21) argument
[all …]
/drivers/leds/trigger/
Dledtrig-backlight.c35 struct bl_trig_notifier *n = container_of(p, in fb_notifier_callback() local
37 struct led_classdev *led = n->led; in fb_notifier_callback()
49 if (new_status == n->old_status) in fb_notifier_callback()
52 if ((n->old_status == UNBLANK) ^ n->invert) { in fb_notifier_callback()
53 n->brightness = led->brightness; in fb_notifier_callback()
56 led_set_brightness_nosleep(led, n->brightness); in fb_notifier_callback()
59 n->old_status = new_status; in fb_notifier_callback()
68 struct bl_trig_notifier *n = led->trigger_data; in bl_trig_invert_show() local
70 return sprintf(buf, "%u\n", n->invert); in bl_trig_invert_show()
77 struct bl_trig_notifier *n = led->trigger_data; in bl_trig_invert_store() local
[all …]
/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.c89 unsigned n; in mvebu_pinctrl_find_group_by_pid() local
90 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
91 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
92 pid < pctl->groups[n].pins[0] + in mvebu_pinctrl_find_group_by_pid()
93 pctl->groups[n].npins) in mvebu_pinctrl_find_group_by_pid()
94 return &pctl->groups[n]; in mvebu_pinctrl_find_group_by_pid()
102 unsigned n; in mvebu_pinctrl_find_group_by_name() local
103 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_name()
104 if (strcmp(name, pctl->groups[n].name) == 0) in mvebu_pinctrl_find_group_by_name()
105 return &pctl->groups[n]; in mvebu_pinctrl_find_group_by_name()
[all …]
/drivers/phy/rockchip/
Dphy-rockchip-typec.c125 #define XCVR_PSM_RCTRL(n) ((0x4001 | ((n) << 9)) << 2) argument
126 #define XCVR_PSM_CAL_TMR(n) ((0x4002 | ((n) << 9)) << 2) argument
127 #define XCVR_PSM_A0IN_TMR(n) ((0x4003 | ((n) << 9)) << 2) argument
128 #define TX_TXCC_CAL_SCLR_MULT(n) ((0x4047 | ((n) << 9)) << 2) argument
129 #define TX_TXCC_CPOST_MULT_00(n) ((0x404c | ((n) << 9)) << 2) argument
130 #define TX_TXCC_CPOST_MULT_01(n) ((0x404d | ((n) << 9)) << 2) argument
131 #define TX_TXCC_CPOST_MULT_10(n) ((0x404e | ((n) << 9)) << 2) argument
132 #define TX_TXCC_CPOST_MULT_11(n) ((0x404f | ((n) << 9)) << 2) argument
133 #define TX_TXCC_MGNFS_MULT_000(n) ((0x4050 | ((n) << 9)) << 2) argument
134 #define TX_TXCC_MGNFS_MULT_001(n) ((0x4051 | ((n) << 9)) << 2) argument
[all …]

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