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Searched refs:out_param (Results 1 – 25 of 25) sorted by relevance

/drivers/infiniband/hw/hns/
Dhns_roce_cmd.c60 u64 in_param, u64 out_param, in __hns_roce_cmd_mbox_post_hw() argument
91 __raw_writeq(cpu_to_le64(out_param), hcr + 2); in __hns_roce_cmd_mbox_post_hw()
106 u64 out_param, u32 in_modifier, in hns_roce_cmd_mbox_post_hw() argument
114 ret = __hns_roce_cmd_mbox_post_hw(hr_dev, in_param, out_param, in hns_roce_cmd_mbox_post_hw()
124 u64 out_param, unsigned long in_modifier, in __hns_roce_cmd_mbox_poll() argument
134 ret = hns_roce_cmd_mbox_post_hw(hr_dev, in_param, out_param, in __hns_roce_cmd_mbox_poll()
165 u64 out_param, unsigned long in_modifier, in hns_roce_cmd_mbox_poll() argument
171 ret = __hns_roce_cmd_mbox_poll(hr_dev, in_param, out_param, in_modifier, in hns_roce_cmd_mbox_poll()
179 u64 out_param) in hns_roce_cmd_event() argument
188 context->out_param = out_param; in hns_roce_cmd_event()
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Dhns_roce_cmd.h61 int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
Dhns_roce_eq.h88 __le64 out_param; member
Dhns_roce_device.h364 u64 out_param; member
654 u64 out_param);
Dhns_roce_eq.c280 le64_to_cpu(aeqe->event.cmd.out_param in hns_roce_aeq_int()
/drivers/net/ethernet/mellanox/mlx4/
Dfw_qos.c165 struct mlx4_alloc_vpp_param *out_param; in mlx4_ALLOCATE_VPP_get() local
171 out_param = mailbox->buf; in mlx4_ALLOCATE_VPP_get()
182 *available_vpp = (u16)be32_to_cpu(out_param->available_vpp); in mlx4_ALLOCATE_VPP_get()
185 vpp_p_up[i] = (u8)be32_to_cpu(out_param->vpp_p_up[i]); in mlx4_ALLOCATE_VPP_get()
222 struct mlx4_vport_qos_param *out_param) in mlx4_SET_VPORT_QOS_get() argument
244 out_param[i].bw_share = be32_to_cpu(ctx->qos_p_up[i].bw_share); in mlx4_SET_VPORT_QOS_get()
245 out_param[i].max_avg_bw = in mlx4_SET_VPORT_QOS_get()
247 out_param[i].enable = in mlx4_SET_VPORT_QOS_get()
Dsense.c44 u64 out_param; in mlx4_SENSE_PORT() local
47 err = mlx4_cmd_imm(dev, 0, &out_param, port, 0, in mlx4_SENSE_PORT()
55 if (out_param > 2) { in mlx4_SENSE_PORT()
56 mlx4_err(dev, "Sense returned illegal value: 0x%llx\n", out_param); in mlx4_SENSE_PORT()
60 *type = out_param; in mlx4_SENSE_PORT()
Dcmd.c131 u64 out_param; member
433 static int mlx4_cmd_post(struct mlx4_dev *dev, u64 in_param, u64 out_param, in mlx4_cmd_post() argument
486 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), hcr + 3); in mlx4_cmd_post()
487 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4); in mlx4_cmd_post()
518 static int mlx4_slave_cmd(struct mlx4_dev *dev, u64 in_param, u64 *out_param, in mlx4_slave_cmd() argument
529 vhcr->out_param = out_param ? cpu_to_be64(*out_param) : 0; in mlx4_slave_cmd()
540 if (out_param) in mlx4_slave_cmd()
541 *out_param = in mlx4_slave_cmd()
542 be64_to_cpu(vhcr->out_param); in mlx4_slave_cmd()
559 if (out_param) in mlx4_slave_cmd()
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Dresource_tracker.c970 u64 in_param, u64 *out_param, int port);
1785 u64 in_param, u64 *out_param) in qp_alloc_res() argument
1818 set_param_l(out_param, base); in qp_alloc_res()
1852 u64 in_param, u64 *out_param) in mtt_alloc_res() argument
1878 set_param_l(out_param, base); in mtt_alloc_res()
1885 u64 in_param, u64 *out_param) in mpt_alloc_res() argument
1911 set_param_l(out_param, index); in mpt_alloc_res()
1934 u64 in_param, u64 *out_param) in cq_alloc_res() argument
1958 set_param_l(out_param, cqn); in cq_alloc_res()
1969 u64 in_param, u64 *out_param) in srq_alloc_res() argument
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Dpd.c78 u64 out_param; in mlx4_xrcd_alloc() local
82 err = mlx4_cmd_imm(dev, 0, &out_param, in mlx4_xrcd_alloc()
89 *xrcdn = get_param_l(&out_param); in mlx4_xrcd_alloc()
Dsrq.c122 u64 out_param; in mlx4_srq_alloc_icm() local
126 err = mlx4_cmd_imm(dev, 0, &out_param, RES_SRQ, in mlx4_srq_alloc_icm()
131 *srqn = get_param_l(&out_param); in mlx4_srq_alloc_icm()
Dport.c344 u64 out_param = 0; in mlx4_register_mac() local
349 err = mlx4_cmd_imm(dev, mac, &out_param, in mlx4_register_mac()
356 set_param_l(&out_param, port); in mlx4_register_mac()
357 err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, in mlx4_register_mac()
366 return get_param_l(&out_param); in mlx4_register_mac()
452 u64 out_param = 0; in mlx4_unregister_mac() local
456 (void) mlx4_cmd_imm(dev, mac, &out_param, in mlx4_unregister_mac()
462 set_param_l(&out_param, port); in mlx4_unregister_mac()
463 (void) mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, in mlx4_unregister_mac()
742 u64 out_param = 0; in mlx4_register_vlan() local
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Dcq.c247 u64 out_param; in mlx4_cq_alloc_icm() local
251 err = mlx4_cmd_imm(dev, 0, &out_param, in_modifier, in mlx4_cq_alloc_icm()
257 *cqn = get_param_l(&out_param); in mlx4_cq_alloc_icm()
Dfw_qos.h128 struct mlx4_vport_qos_param *out_param);
Dmr.c177 u64 out_param; in mlx4_alloc_mtt_range() local
182 err = mlx4_cmd_imm(dev, in_param, &out_param, RES_MTT, in mlx4_alloc_mtt_range()
189 return get_param_l(&out_param); in mlx4_alloc_mtt_range()
448 u64 out_param; in mlx4_mpt_reserve() local
451 if (mlx4_cmd_imm(dev, 0, &out_param, RES_MPT, RES_OP_RESERVE, in mlx4_mpt_reserve()
455 return get_param_l(&out_param); in mlx4_mpt_reserve()
Dqp.c252 u64 out_param; in mlx4_qp_reserve_range() local
261 err = mlx4_cmd_imm(dev, in_param, &out_param, in mlx4_qp_reserve_range()
268 *base = get_param_l(&out_param); in mlx4_qp_reserve_range()
Dmlx4.h177 u64 out_param; member
190 __be64 out_param; member
1212 void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param);
Dmain.c2547 u64 out_param; in mlx4_counter_alloc() local
2551 err = mlx4_cmd_imm(dev, 0, &out_param, in_modifier, in mlx4_counter_alloc()
2555 *idx = get_param_l(&out_param); in mlx4_counter_alloc()
Deq.c600 be64_to_cpu(eqe->event.cmd.out_param)); in mlx4_eq_int()
/drivers/infiniband/hw/mthca/
Dmthca_cmd.c182 u64 out_param; member
200 u64 out_param, in mthca_cmd_post_dbell() argument
215 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), ptr + offs[3]); in mthca_cmd_post_dbell()
217 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), ptr + offs[4]); in mthca_cmd_post_dbell()
232 u64 out_param, in mthca_cmd_post_hcr() argument
260 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4); in mthca_cmd_post_hcr()
261 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4); in mthca_cmd_post_hcr()
277 u64 out_param, in mthca_cmd_post() argument
289 mthca_cmd_post_dbell(dev, in_param, out_param, in_modifier, in mthca_cmd_post()
292 err = mthca_cmd_post_hcr(dev, in_param, out_param, in_modifier, in mthca_cmd_post()
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Dmthca_cmd.h249 u8 status, u64 out_param);
Dmthca_eq.c140 __be64 out_param; member
330 be64_to_cpu(eqe->event.cmd.out_param)); in mthca_eq_int()
/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_io.c119 u64 out_param; in write_sq_ctxts() local
144 &out_param); in write_sq_ctxts()
145 if ((err) || (out_param != 0)) { in write_sq_ctxts()
163 u64 out_param; in write_rq_ctxts() local
188 &out_param); in write_rq_ctxts()
189 if ((err) || (out_param != 0)) { in write_rq_ctxts()
Dhinic_hw_cmdq.h177 struct hinic_cmdq_buf *buf_in, u64 *out_param);
/drivers/net/ethernet/mellanox/mlxsw/
Dpci.c153 u64 out_param; member
689 mlxsw_pci->cmd.comp.out_param = in mlxsw_pci_eq_cmd_event()