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Searched refs:pPhyReg (Results 1 – 6 of 6) sorted by relevance

/drivers/staging/rtl8723bs/hal/
Drtl8723b_rf6052.c95 struct bb_register_def *pPhyReg; in phy_RF6052_Config_ParaFile() local
115 pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RF6052_Config_ParaFile()
121 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); in phy_RF6052_Config_ParaFile()
125 u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); in phy_RF6052_Config_ParaFile()
130 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); in phy_RF6052_Config_ParaFile()
134 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_RF6052_Config_ParaFile()
138 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 825… in phy_RF6052_Config_ParaFile()
141 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255… in phy_RF6052_Config_ParaFile()
170 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_RF6052_Config_ParaFile()
174 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); in phy_RF6052_Config_ParaFile()
Drtl8723b_phycfg.c141 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialRead_8723B() local
182 retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData); in phy_RFSerialRead_8723B()
187 retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData); in phy_RFSerialRead_8723B()
247 struct bb_register_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; in phy_RFSerialWrite_8723B() local
266 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in phy_RFSerialWrite_8723B()
/drivers/staging/rtl8192e/rtl8192e/
Dr8190P_rtl8256.c68 struct bb_reg_definition *pPhyReg; in rtl92e_config_rf() local
83 pPhyReg = &priv->PHYRegDef[eRFPath]; in rtl92e_config_rf()
89 u4RegValue = rtl92e_get_bb_reg(dev, pPhyReg->rfintfs, in rtl92e_config_rf()
94 u4RegValue = rtl92e_get_bb_reg(dev, pPhyReg->rfintfs, in rtl92e_config_rf()
99 rtl92e_set_bb_reg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); in rtl92e_config_rf()
101 rtl92e_set_bb_reg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in rtl92e_config_rf()
103 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
105 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
139 rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, bRFSI_RFENV, in rtl92e_config_rf()
144 rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, in rtl92e_config_rf()
Dr8192E_phy.c107 struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; in _rtl92e_phy_rf_read() local
115 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
122 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
134 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, in _rtl92e_phy_rf_read()
136 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); in _rtl92e_phy_rf_read()
137 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); in _rtl92e_phy_rf_read()
141 ret = rtl92e_get_bb_reg(dev, pPhyReg->rfLSSIReadBack, in _rtl92e_phy_rf_read()
147 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, in _rtl92e_phy_rf_read()
164 struct bb_reg_definition *pPhyReg = &priv->PHYRegDef[eRFPath]; in _rtl92e_phy_rf_write() local
172 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
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/drivers/staging/rtl8192u/
Dr8190_rtl8256.c110 BB_REGISTER_DEFINITION_T *pPhyReg; in phy_RF8256_Config_ParaFile() local
122 pPhyReg = &priv->PHYRegDef[eRFPath]; in phy_RF8256_Config_ParaFile()
131 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); in phy_RF8256_Config_ParaFile()
135 u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16); in phy_RF8256_Config_ParaFile()
140 rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); in phy_RF8256_Config_ParaFile()
143 rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_RF8256_Config_ParaFile()
146 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 0 to 4 bits for Z-se… in phy_RF8256_Config_ParaFile()
147 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-seri… in phy_RF8256_Config_ParaFile()
201 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_RF8256_Config_ParaFile()
205 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); in phy_RF8256_Config_ParaFile()
Dr819xU_phy.c138 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath]; in rtl8192_phy_RFSerialRead() local
140 rtl8192_setBBreg(dev, pPhyReg->rfLSSIReadBack, bLSSIReadBackData, 0); in rtl8192_phy_RFSerialRead()
149 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialRead()
158 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialRead()
172 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, in rtl8192_phy_RFSerialRead()
175 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); in rtl8192_phy_RFSerialRead()
176 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); in rtl8192_phy_RFSerialRead()
182 ret = rtl8192_QueryBBReg(dev, pPhyReg->rfLSSIReadBack, in rtl8192_phy_RFSerialRead()
190 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, in rtl8192_phy_RFSerialRead()
223 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath]; in rtl8192_phy_RFSerialWrite() local
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