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Searched refs:pci (Results 1 – 25 of 993) sorted by relevance

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/drivers/gpu/drm/nouveau/nvkm/subdev/pci/
Dbase.c32 nvkm_pci_rd32(struct nvkm_pci *pci, u16 addr) in nvkm_pci_rd32() argument
34 return pci->func->rd32(pci, addr); in nvkm_pci_rd32()
38 nvkm_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data) in nvkm_pci_wr08() argument
40 pci->func->wr08(pci, addr, data); in nvkm_pci_wr08()
44 nvkm_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data) in nvkm_pci_wr32() argument
46 pci->func->wr32(pci, addr, data); in nvkm_pci_wr32()
50 nvkm_pci_mask(struct nvkm_pci *pci, u16 addr, u32 mask, u32 value) in nvkm_pci_mask() argument
52 u32 data = pci->func->rd32(pci, addr); in nvkm_pci_mask()
53 pci->func->wr32(pci, addr, (data & ~mask) | value); in nvkm_pci_mask()
58 nvkm_pci_rom_shadow(struct nvkm_pci *pci, bool shadow) in nvkm_pci_rom_shadow() argument
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Dpcie.c51 nvkm_pcie_get_version(struct nvkm_pci *pci) in nvkm_pcie_get_version() argument
53 if (!pci->func->pcie.version) in nvkm_pcie_get_version()
56 return pci->func->pcie.version(pci); in nvkm_pcie_get_version()
60 nvkm_pcie_get_max_version(struct nvkm_pci *pci) in nvkm_pcie_get_max_version() argument
62 if (!pci->func->pcie.version_supported) in nvkm_pcie_get_max_version()
65 return pci->func->pcie.version_supported(pci); in nvkm_pcie_get_max_version()
69 nvkm_pcie_set_version(struct nvkm_pci *pci, int version) in nvkm_pcie_set_version() argument
71 if (!pci->func->pcie.set_version) in nvkm_pcie_set_version()
74 nvkm_trace(&pci->subdev, "set to version %i\n", version); in nvkm_pcie_set_version()
75 pci->func->pcie.set_version(pci, version); in nvkm_pcie_set_version()
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Dagp.c44 nvkm_agp_fini(struct nvkm_pci *pci) in nvkm_agp_fini() argument
46 if (pci->agp.acquired) { in nvkm_agp_fini()
47 agp_backend_release(pci->agp.bridge); in nvkm_agp_fini()
48 pci->agp.acquired = false; in nvkm_agp_fini()
56 nvkm_agp_preinit(struct nvkm_pci *pci) in nvkm_agp_preinit() argument
58 struct nvkm_device *device = pci->subdev.device; in nvkm_agp_preinit()
59 u32 mode = nvkm_pci_rd32(pci, 0x004c); in nvkm_agp_preinit()
66 if ((mode | pci->agp.mode) & PCI_AGP_COMMAND_FW) { in nvkm_agp_preinit()
67 mode = pci->agp.mode & ~PCI_AGP_COMMAND_FW; in nvkm_agp_preinit()
68 agp_enable(pci->agp.bridge, mode); in nvkm_agp_preinit()
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Dgk104.c27 gk104_pcie_version_supported(struct nvkm_pci *pci) in gk104_pcie_version_supported() argument
29 return (nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x4) == 0x4 ? 2 : 1; in gk104_pcie_version_supported()
33 gk104_pcie_set_cap_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed) in gk104_pcie_set_cap_speed() argument
35 struct nvkm_device *device = pci->subdev.device; in gk104_pcie_set_cap_speed()
39 gf100_pcie_set_cap_speed(pci, false); in gk104_pcie_set_cap_speed()
43 gf100_pcie_set_cap_speed(pci, true); in gk104_pcie_set_cap_speed()
47 gf100_pcie_set_cap_speed(pci, true); in gk104_pcie_set_cap_speed()
54 gk104_pcie_cap_speed(struct nvkm_pci *pci) in gk104_pcie_cap_speed() argument
56 int speed = gf100_pcie_cap_speed(pci); in gk104_pcie_cap_speed()
62 int speed2 = nvkm_rd32(pci->subdev.device, 0x8c1c0) & 0x30000; in gk104_pcie_cap_speed()
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Dg84.c29 g84_pcie_version_supported(struct nvkm_pci *pci) in g84_pcie_version_supported() argument
36 g84_pcie_version(struct nvkm_pci *pci) in g84_pcie_version() argument
38 struct nvkm_device *device = pci->subdev.device; in g84_pcie_version()
43 g84_pcie_set_version(struct nvkm_pci *pci, u8 ver) in g84_pcie_set_version() argument
45 struct nvkm_device *device = pci->subdev.device; in g84_pcie_set_version()
50 g84_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed) in g84_pcie_set_cap_speed() argument
52 struct nvkm_device *device = pci->subdev.device; in g84_pcie_set_cap_speed()
57 g84_pcie_cur_speed(struct nvkm_pci *pci) in g84_pcie_cur_speed() argument
59 u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000; in g84_pcie_cur_speed()
72 g84_pcie_max_speed(struct nvkm_pci *pci) in g84_pcie_max_speed() argument
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Dgf100.c27 gf100_pci_msi_rearm(struct nvkm_pci *pci) in gf100_pci_msi_rearm() argument
29 nvkm_pci_wr08(pci, 0x0704, 0xff); in gf100_pci_msi_rearm()
33 gf100_pcie_set_version(struct nvkm_pci *pci, u8 ver) in gf100_pcie_set_version() argument
35 struct nvkm_device *device = pci->subdev.device; in gf100_pcie_set_version()
40 gf100_pcie_version(struct nvkm_pci *pci) in gf100_pcie_version() argument
42 struct nvkm_device *device = pci->subdev.device; in gf100_pcie_version()
47 gf100_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed) in gf100_pcie_set_cap_speed() argument
49 struct nvkm_device *device = pci->subdev.device; in gf100_pcie_set_cap_speed()
54 gf100_pcie_cap_speed(struct nvkm_pci *pci) in gf100_pcie_cap_speed() argument
56 struct nvkm_device *device = pci->subdev.device; in gf100_pcie_cap_speed()
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/drivers/edac/
Dedac_pci.c34 struct edac_pci_ctl_info *pci; in edac_pci_alloc_ctl_info() local
40 pci = edac_align_ptr(&p, sizeof(*pci), 1); in edac_pci_alloc_ctl_info()
45 pci = kzalloc(size, GFP_KERNEL); in edac_pci_alloc_ctl_info()
46 if (pci == NULL) in edac_pci_alloc_ctl_info()
50 pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL; in edac_pci_alloc_ctl_info()
52 pci->pvt_info = pvt; in edac_pci_alloc_ctl_info()
53 pci->op_state = OP_ALLOC; in edac_pci_alloc_ctl_info()
55 snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name); in edac_pci_alloc_ctl_info()
57 return pci; in edac_pci_alloc_ctl_info()
61 void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci) in edac_pci_free_ctl_info() argument
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Docteon_edac-pci.c23 static void octeon_pci_poll(struct edac_pci_ctl_info *pci) in octeon_pci_poll() argument
29 edac_pci_handle_pe(pci, pci->ctl_name); in octeon_pci_poll()
34 edac_pci_handle_npe(pci, "Signaled System Error"); in octeon_pci_poll()
39 edac_pci_handle_npe(pci, "Received Master Abort"); in octeon_pci_poll()
44 edac_pci_handle_npe(pci, "Received Target Abort"); in octeon_pci_poll()
49 edac_pci_handle_npe(pci, "Signaled Target Abort"); in octeon_pci_poll()
54 edac_pci_handle_npe(pci, "Master Data Parity Error"); in octeon_pci_poll()
62 struct edac_pci_ctl_info *pci; in octeon_pci_probe() local
65 pci = edac_pci_alloc_ctl_info(0, "octeon_pci_err"); in octeon_pci_probe()
66 if (!pci) in octeon_pci_probe()
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/drivers/pinctrl/
Dpinctrl-rk805.c142 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); in rk805_gpio_get() local
145 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val); in rk805_gpio_get()
147 dev_err(pci->dev, "get gpio%d value failed\n", offset); in rk805_gpio_get()
151 return !!(val & pci->pin_cfg[offset].val_msk); in rk805_gpio_get()
158 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); in rk805_gpio_set() local
161 ret = regmap_update_bits(pci->rk808->regmap, in rk805_gpio_set()
162 pci->pin_cfg[offset].reg, in rk805_gpio_set()
163 pci->pin_cfg[offset].val_msk, in rk805_gpio_set()
164 value ? pci->pin_cfg[offset].val_msk : 0); in rk805_gpio_set()
166 dev_err(pci->dev, "set gpio%d value %d failed\n", in rk805_gpio_set()
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Dpinctrl-palmas.c573 static int palmas_pinctrl_get_pin_mux(struct palmas_pctrl_chip_info *pci) in palmas_pinctrl_get_pin_mux() argument
580 for (i = 0; i < pci->num_pin_groups; ++i) { in palmas_pinctrl_get_pin_mux()
581 g = &pci->pin_groups[i]; in palmas_pinctrl_get_pin_mux()
583 pci->pins_current_opt[i] = 0; in palmas_pinctrl_get_pin_mux()
586 ret = palmas_read(pci->palmas, g->mux_reg_base, in palmas_pinctrl_get_pin_mux()
589 dev_err(pci->dev, "mux_reg 0x%02x read failed: %d\n", in palmas_pinctrl_get_pin_mux()
594 pci->pins_current_opt[i] = val >> g->mux_bit_shift; in palmas_pinctrl_get_pin_mux()
599 static int palmas_pinctrl_set_dvfs1(struct palmas_pctrl_chip_info *pci, in palmas_pinctrl_set_dvfs1() argument
606 ret = palmas_update_bits(pci->palmas, PALMAS_PU_PD_OD_BASE, in palmas_pinctrl_set_dvfs1()
610 dev_err(pci->dev, "SECONDARY_PAD3 update failed %d\n", ret); in palmas_pinctrl_set_dvfs1()
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/drivers/pci/dwc/
Dpcie-designware.c64 u32 __dw_pcie_read_dbi(struct dw_pcie *pci, void __iomem *base, u32 reg, in __dw_pcie_read_dbi() argument
70 if (pci->ops->read_dbi) in __dw_pcie_read_dbi()
71 return pci->ops->read_dbi(pci, base, reg, size); in __dw_pcie_read_dbi()
75 dev_err(pci->dev, "read DBI address failed\n"); in __dw_pcie_read_dbi()
80 void __dw_pcie_write_dbi(struct dw_pcie *pci, void __iomem *base, u32 reg, in __dw_pcie_write_dbi() argument
85 if (pci->ops->write_dbi) { in __dw_pcie_write_dbi()
86 pci->ops->write_dbi(pci, base, reg, size, val); in __dw_pcie_write_dbi()
92 dev_err(pci->dev, "write DBI address failed\n"); in __dw_pcie_write_dbi()
95 static u32 dw_pcie_readl_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg) in dw_pcie_readl_ob_unroll() argument
99 return dw_pcie_readl_dbi(pci, offset + reg); in dw_pcie_readl_ob_unroll()
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Dpcie-armada8k.c32 struct dw_pcie *pci; member
72 static int armada8k_pcie_link_up(struct dw_pcie *pci) in armada8k_pcie_link_up() argument
77 reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_STATUS_REG); in armada8k_pcie_link_up()
82 dev_dbg(pci->dev, "No link detected (Global-Status: 0x%08x).\n", reg); in armada8k_pcie_link_up()
88 struct dw_pcie *pci = pcie->pci; in armada8k_pcie_establish_link() local
91 if (!dw_pcie_link_up(pci)) { in armada8k_pcie_establish_link()
93 reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); in armada8k_pcie_establish_link()
95 dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg); in armada8k_pcie_establish_link()
99 reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); in armada8k_pcie_establish_link()
102 dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg); in armada8k_pcie_establish_link()
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Dpcie-designware-ep.c33 static void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) in dw_pcie_ep_reset_bar() argument
38 dw_pcie_dbi_ro_wr_en(pci); in dw_pcie_ep_reset_bar()
39 dw_pcie_writel_dbi2(pci, reg, 0x0); in dw_pcie_ep_reset_bar()
40 dw_pcie_writel_dbi(pci, reg, 0x0); in dw_pcie_ep_reset_bar()
41 dw_pcie_dbi_ro_wr_dis(pci); in dw_pcie_ep_reset_bar()
48 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); in dw_pcie_ep_write_header() local
50 dw_pcie_dbi_ro_wr_en(pci); in dw_pcie_ep_write_header()
51 dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, hdr->vendorid); in dw_pcie_ep_write_header()
52 dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, hdr->deviceid); in dw_pcie_ep_write_header()
53 dw_pcie_writeb_dbi(pci, PCI_REVISION_ID, hdr->revid); in dw_pcie_ep_write_header()
[all …]
Dpci-layerscape.c48 struct dw_pcie *pci; member
59 struct dw_pcie *pci = pcie->pci; in ls_pcie_is_bridge() local
62 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_is_bridge()
71 struct dw_pcie *pci = pcie->pci; in ls_pcie_clear_multifunction() local
73 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_clear_multifunction()
80 struct dw_pcie *pci = pcie->pci; in ls_pcie_drop_msg_tlp() local
82 val = ioread32(pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
84 iowrite32(val, pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
92 dw_pcie_disable_atu(pcie->pci, i, DW_PCIE_REGION_OUTBOUND); in ls_pcie_disable_outbound_atus()
95 static int ls1021_pcie_link_up(struct dw_pcie *pci) in ls1021_pcie_link_up() argument
[all …]
Dpcie-spear13xx.c28 struct dw_pcie *pci; member
77 struct dw_pcie *pci = spear13xx_pcie->pci; in spear13xx_pcie_establish_link() local
78 struct pcie_port *pp = &pci->pp; in spear13xx_pcie_establish_link()
83 if (dw_pcie_link_up(pci)) { in spear13xx_pcie_establish_link()
84 dev_err(pci->dev, "link already up\n"); in spear13xx_pcie_establish_link()
95 dw_pcie_read(pci->dbi_base + exp_cap_off + PCI_EXP_DEVCTL, 2, &val); in spear13xx_pcie_establish_link()
97 dw_pcie_write(pci->dbi_base + exp_cap_off + PCI_EXP_DEVCTL, 2, val); in spear13xx_pcie_establish_link()
99 dw_pcie_write(pci->dbi_base + PCI_VENDOR_ID, 2, 0x104A); in spear13xx_pcie_establish_link()
100 dw_pcie_write(pci->dbi_base + PCI_DEVICE_ID, 2, 0xCD80); in spear13xx_pcie_establish_link()
107 dw_pcie_read(pci->dbi_base + exp_cap_off + PCI_EXP_LNKCAP, in spear13xx_pcie_establish_link()
[all …]
Dpci-imx6.c46 struct dw_pcie *pci; member
110 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_poll_ack() local
116 val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT); in pcie_phy_poll_ack()
131 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_wait_ack() local
136 dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val); in pcie_phy_wait_ack()
139 dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val); in pcie_phy_wait_ack()
146 dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val); in pcie_phy_wait_ack()
154 struct dw_pcie *pci = imx6_pcie->pci; in pcie_phy_read() local
164 dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl); in pcie_phy_read()
170 val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT); in pcie_phy_read()
[all …]
Dpcie-designware.h236 u32 __dw_pcie_read_dbi(struct dw_pcie *pci, void __iomem *base, u32 reg,
238 void __dw_pcie_write_dbi(struct dw_pcie *pci, void __iomem *base, u32 reg,
240 int dw_pcie_link_up(struct dw_pcie *pci);
241 int dw_pcie_wait_for_link(struct dw_pcie *pci);
242 void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
245 int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,
247 void dw_pcie_disable_atu(struct dw_pcie *pci, int index,
249 void dw_pcie_setup(struct dw_pcie *pci);
251 static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val) in dw_pcie_writel_dbi() argument
253 __dw_pcie_write_dbi(pci, pci->dbi_base, reg, 0x4, val); in dw_pcie_writel_dbi()
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Dpci-dra7xx.c88 struct dw_pcie *pci; member
119 static int dra7xx_pcie_link_up(struct dw_pcie *pci) in dra7xx_pcie_link_up() argument
121 struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); in dra7xx_pcie_link_up()
127 static void dra7xx_pcie_stop_link(struct dw_pcie *pci) in dra7xx_pcie_stop_link() argument
129 struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); in dra7xx_pcie_stop_link()
137 static int dra7xx_pcie_establish_link(struct dw_pcie *pci) in dra7xx_pcie_establish_link() argument
139 struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); in dra7xx_pcie_establish_link()
140 struct device *dev = pci->dev; in dra7xx_pcie_establish_link()
144 if (dw_pcie_link_up(pci)) { in dra7xx_pcie_establish_link()
150 dw_pcie_read(pci->dbi_base + exp_cap_off + PCI_EXP_LNKCAP, in dra7xx_pcie_establish_link()
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Dpcie-artpec6.c30 struct dw_pcie *pci; member
88 struct dw_pcie *pci = artpec6_pcie->pci; in artpec6_pcie_establish_link() local
89 struct pcie_port *pp = &pci->pp; in artpec6_pcie_establish_link()
153 if (!dw_pcie_wait_for_link(pci)) in artpec6_pcie_establish_link()
156 dev_dbg(pci->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n", in artpec6_pcie_establish_link()
157 dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R0), in artpec6_pcie_establish_link()
158 dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1)); in artpec6_pcie_establish_link()
165 struct dw_pcie *pci = artpec6_pcie->pci; in artpec6_pcie_enable_interrupts() local
166 struct pcie_port *pp = &pci->pp; in artpec6_pcie_enable_interrupts()
174 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in artpec6_pcie_host_init() local
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Dpci-keystone-dw.c86 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in ks_dw_pcie_get_msi_addr() local
87 struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); in ks_dw_pcie_get_msi_addr()
104 struct dw_pcie *pci = ks_pcie->pci; in ks_dw_pcie_handle_msi_irq() local
105 struct pcie_port *pp = &pci->pp; in ks_dw_pcie_handle_msi_irq()
106 struct device *dev = pci->dev; in ks_dw_pcie_handle_msi_irq()
133 struct dw_pcie *pci; in ks_dw_pcie_msi_irq_ack() local
137 pci = to_dw_pcie_from_pp(pp); in ks_dw_pcie_msi_irq_ack()
138 ks_pcie = to_keystone_pcie(pci); in ks_dw_pcie_msi_irq_ack()
150 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in ks_dw_pcie_msi_set_irq() local
151 struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); in ks_dw_pcie_msi_set_irq()
[all …]
/drivers/uwb/
Dwhci.c18 struct pci_dev *pci; member
30 struct pci_dev *pci_dev = card->pci; in whci_capdata_quirks()
98 umc = umc_device_create(&card->pci->dev, n); in whci_add_cap()
112 umc->resource.start = pci_resource_start(card->pci, bar) in whci_add_cap()
117 umc->resource.flags = card->pci->resource[bar].flags; in whci_add_cap()
118 umc->resource.parent = &card->pci->resource[bar]; in whci_add_cap()
119 umc->irq = card->pci->irq; in whci_add_cap()
139 static int whci_n_caps(struct pci_dev *pci) in whci_n_caps() argument
144 uwbbase = pci_iomap(pci, 0, 8); in whci_n_caps()
148 pci_iounmap(pci, uwbbase); in whci_n_caps()
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/drivers/media/pci/
DKconfig13 source "drivers/media/pci/meye/Kconfig"
14 source "drivers/media/pci/solo6x10/Kconfig"
15 source "drivers/media/pci/sta2x11/Kconfig"
16 source "drivers/media/pci/tw5864/Kconfig"
17 source "drivers/media/pci/tw68/Kconfig"
18 source "drivers/media/pci/tw686x/Kconfig"
19 source "drivers/media/pci/zoran/Kconfig"
24 source "drivers/media/pci/ivtv/Kconfig"
25 source "drivers/media/pci/saa7146/Kconfig"
26 source "drivers/media/pci/dt3155/Kconfig"
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/drivers/net/ethernet/mellanox/mlxsw/
Dpci_hw.h99 MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
111 MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
116 MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
121 MLXSW_ITEM16_INDEXED(pci, wqe, byte_count, 0x02, 0, 14, 0x02, 0x00, false);
127 MLXSW_ITEM64_INDEXED(pci, wqe, address, 0x08, 0, 64, 0x8, 0x0, false);
132 MLXSW_ITEM32(pci, cqe, lag, 0x00, 23, 1);
140 MLXSW_ITEM32(pci, cqe, system_port, 0x00, 0, 16);
141 MLXSW_ITEM32(pci, cqe, lag_id, 0x00, 4, 12);
142 MLXSW_ITEM32(pci, cqe, lag_port_index, 0x00, 0, 4);
147 MLXSW_ITEM32(pci, cqe, wqe_counter, 0x04, 16, 16);
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/drivers/usb/gadget/udc/bdc/
Dbdc_pci.c33 static int bdc_setup_msi(struct pci_dev *pci) in bdc_setup_msi() argument
37 ret = pci_enable_msi(pci); in bdc_setup_msi()
46 static int bdc_pci_probe(struct pci_dev *pci, const struct pci_device_id *id) in bdc_pci_probe() argument
53 glue = devm_kzalloc(&pci->dev, sizeof(*glue), GFP_KERNEL); in bdc_pci_probe()
57 glue->dev = &pci->dev; in bdc_pci_probe()
58 ret = pci_enable_device(pci); in bdc_pci_probe()
60 dev_err(&pci->dev, "failed to enable pci device\n"); in bdc_pci_probe()
63 pci_set_master(pci); in bdc_pci_probe()
70 bdc_setup_msi(pci); in bdc_pci_probe()
72 res[0].start = pci_resource_start(pci, 0); in bdc_pci_probe()
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/drivers/staging/rts5208/
Drtsx.c140 dev_err(&dev->pci->dev, "Error: chip->srb = %p\n", in queuecommand_lck()
147 dev_info(&dev->pci->dev, "Fail command during disconnect\n"); in queuecommand_lck()
174 dev_info(&dev->pci->dev, "%s called\n", __func__); in DEF_SCSI_QCMD()
181 dev_info(&dev->pci->dev, "-- nothing to abort\n"); in DEF_SCSI_QCMD()
203 dev_info(&dev->pci->dev, "%s called\n", __func__); in device_reset()
260 dev_info(&dev->pci->dev, "%s: chip->msi_en = %d, pci->irq = %d\n", in rtsx_acquire_irq()
261 __func__, chip->msi_en, dev->pci->irq); in rtsx_acquire_irq()
263 if (request_irq(dev->pci->irq, rtsx_interrupt, in rtsx_acquire_irq()
266 dev_err(&dev->pci->dev, in rtsx_acquire_irq()
268 dev->pci->irq); in rtsx_acquire_irq()
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