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Searched refs:pll8 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_dpll_mgr.h136 uint32_t ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, member
Dintel_dpll_mgr.c1500 temp |= pll->state.hw_state.pll8; in bxt_ddi_pll_enable()
1615 hw_state->pll8 = I915_READ(BXT_PORT_PLL(phy, ch, 8)); in bxt_ddi_pll_get_hw_state()
1616 hw_state->pll8 &= PORT_PLL_TARGET_CNT_MASK; in bxt_ddi_pll_get_hw_state()
1766 dpll_hw_state->pll8 = targ_cnt; in bxt_ddi_set_dpll_hw_state()
1863 hw_state->pll8, in bxt_dump_hw_state()
/drivers/clk/qcom/
Dgcc-mdm9615.c86 static struct clk_pll pll8 = { variable
1602 [PLL8] = &pll8.clkr,
Dgcc-msm8960.c62 static struct clk_pll pll8 = { variable
2998 [PLL8] = &pll8.clkr,
3223 [PLL8] = &pll8.clkr,
Dgcc-msm8660.c35 static struct clk_pll pll8 = { variable
2462 [PLL8] = &pll8.clkr,
Dgcc-ipq806x.c89 static struct clk_pll pll8 = { variable
2690 [PLL8] = &pll8.clkr,