Searched refs:pll_reg (Results 1 – 6 of 6) sorted by relevance
36 unsigned int pll_reg; in get_mxclk_freq() local42 pll_reg = peek32(MXCLK_PLL_CTRL); in get_mxclk_freq()43 M = (pll_reg & PLL_CTRL_M_MASK) >> PLL_CTRL_M_SHIFT; in get_mxclk_freq()44 N = (pll_reg & PLL_CTRL_N_MASK) >> PLL_CTRL_N_SHIFT; in get_mxclk_freq()45 OD = (pll_reg & PLL_CTRL_OD_MASK) >> PLL_CTRL_OD_SHIFT; in get_mxclk_freq()46 POD = (pll_reg & PLL_CTRL_POD_MASK) >> PLL_CTRL_POD_SHIFT; in get_mxclk_freq()
41 static struct cpufreq_frequency_table *pll_reg; variable308 if (!pll_reg || cpu_cur.lock_pll) { in s3c_cpufreq_target()321 tmp_policy.freq_table = pll_reg; in s3c_cpufreq_target()329 pll = pll_reg + index; in s3c_cpufreq_target()650 pll_reg = vals; in s3c_plltab_register()
72 __le16 pll_reg; member
46 .pll_reg = cpu_to_le16(0x9f0),70 .pll_reg = cpu_to_le16(0x9f0),94 .pll_reg = cpu_to_le16(0x9f0),140 .pll_reg = cpu_to_le16(0x9f0),164 .pll_reg = cpu_to_le16(0x9f0),188 .pll_reg = cpu_to_le16(0x9f0),
217 u16 pll_reg; member226 .pll_reg = 0x806c,233 .pll_reg = 0x13,617 priv->pll_register_no = desired_fw->pll_reg; in xc5000_fwupload()
517 unsigned int pll_reg = 0; in sm501_set_clock() local543 pll_reg = 0x20000 | (to.k << 15) | (to.n << 8) | to.m; in sm501_set_clock()616 if (pll_reg) in sm501_set_clock()617 smc501_writel(pll_reg, in sm501_set_clock()